From mboxrd@z Thu Jan  1 00:00:00 1970
From: Isaku Yamahata <yamahata@valinux.co.jp>
Subject: Re: [PATCH 1/3] VT-d: support Intel IGD passthrough
Date: Thu, 18 Feb 2010 18:49:55 +0900
Message-ID: <20100218094955.GC28653@valinux.co.jp>
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To: Weidong Han <weidong.han@intel.com>
Cc: "Kay, Allen M" <allen.m.kay@intel.com>, "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>, Ian Jackson <Ian.Jackson@eu.citrix.com>, Keir Fraser <keir.fraser@eu.citrix.com>
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On Fri, Feb 05, 2010 at 09:52:47AM +0800, Weidong Han wrote:
> Ian Jackson wrote:
>> Han, Weidong writes ("[Xen-devel][PATCH 1/3] VT-d: support Intel IGD passthrough "):
>>   
>>> Some registers of Intel IGD are mapped in host bridge, so it needs
>>> to passthrough these registers of physical host bridge to guest
>>> because emulated host bridge in guest doesn't have these mappings.
>>>
>>> Some VBIOSs and drivers ssume the IGD BDF (bus:device:function) is
>>> always 00:02.0, so this patch reserves 00:02.0 for assigned IGD in
>>> guest.
>>>     
>>
>> Thanks for the contribution, which I have applied with a very small
>> change to avoid having an open else at #endif.
>>
>> However the part in pci.c is really very ugly indeed.  If we ever get
>> around to rebasing to recent upstream qemu and trying to upstream our
>> patches, this is sure to be dropped.  So you might profitably spend
>> some time thinking how to make it less ugly.
>>
>> Thanks,
>> Ian.
>>   
>
> Thanks for check-in.  I agree the hacking in pci.c is not elegant. We  
> will think how to make it cleaner.

This can be moved out as read_config callback.
See 400fx_init() calling pci_register_device() in pciix_pci.c
and some wrapper of pt_cpi_read_config().

thanks,

>
> Regards,
> Weidong
>
>
>>   
>>> +#ifdef CONFIG_PASSTHROUGH
>>> +    /* host bridge reads for IGD passthrough */
>>> +    if ( igd_passthru && pci_dev->devfn == 0x00 )
>>> +    {
>>> +        val = pci_dev->config_read(pci_dev, config_addr, len);
>>> +
>>> +        if ( config_addr == 0x00 && len == 4 )
>>> +            val = pt_pci_host_read_long(0, 0, 0, 0x00);
>>> +        else if ( config_addr == 0x02 ) // Device ID
>>> +            val = pt_pci_host_read_word(0, 0, 0, 0x02);
>>> +        else if ( config_addr == 0x52 ) // GMCH Graphics Control Register
>>> +            val = pt_pci_host_read_word(0, 0, 0, 0x52);
>>> +        else if ( config_addr == 0xa0 ) // GMCH Top of Memory Register
>>> +            val = pt_pci_host_read_word(0, 0, 0, 0xa0);
>>> +    }
>>> +    else if ( igd_passthru && pci_dev->devfn == 0x10 &&
>>> +              config_addr == 0xfc ) // read on IGD device
>>> +        val = 0;  // use SMI to communicate with the system BIOS
>>> +    else
>>> +#endif
>>> +        val = pci_dev->config_read(pci_dev, config_addr, len);
>>> +
>>>     
>
>
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-- 
yamahata