From: Mukesh Rathor <mukesh.rathor@oracle.com>
To: Jan Beulich <JBeulich@novell.com>
Cc: "Xen-devel@lists.xensource.com" <Xen-devel@lists.xensource.com>
Subject: Re: [help] rsp in case of interrupt/exception in ring0
Date: Wed, 24 Feb 2010 20:42:44 -0800 [thread overview]
Message-ID: <20100224204244.4baf276e@mantra.us.oracle.com> (raw)
In-Reply-To: <4B84F2E30200007800030ECC@vpn.id2.novell.com>
On Wed, 24 Feb 2010 08:35:31 +0000
"Jan Beulich" <JBeulich@novell.com> wrote:
> >>> Mukesh Rathor <mukesh.rathor@oracle.com> 24.02.10 04:39 >>>
> >When a cpu is in hyp code and int/exception comes in, how/where is
> >rsp saved? According to intel manual if there's no ring transition,
> >then the cpu doesn't save ss/rsp.
>
> As you're apparently talking about x86-64, you probably simply read
> the wrong (32-bit) part of the manual. On 64-bits, ss:rsp are always
> getting saved, no matter whether there's a ring transition.
>
You are right, few pages later, it talks about 64. Usually, they'll say
something about things being different on 64bit. Anyways. I'll email intel
docs to fix it...
thanks,
Mukesh
prev parent reply other threads:[~2010-02-25 4:42 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-02-24 3:39 [help] rsp in case of interrupt/exception in ring0 Mukesh Rathor
2010-02-24 8:35 ` Jan Beulich
2010-02-25 4:42 ` Mukesh Rathor [this message]
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