From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konrad Rzeszutek Wilk Subject: Re: Intel Xeon E5620 CPU and VT-d (IOMMU) support? Date: Wed, 2 Jun 2010 14:02:58 -0400 Message-ID: <20100602180258.GA31974@phenom.dumpdata.com> References: <20100602164007.GM17817@reaktio.net> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Return-path: Content-Disposition: inline In-Reply-To: <20100602164007.GM17817@reaktio.net> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Pasi =?iso-8859-1?Q?K=E4rkk=E4inen?= Cc: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org On Wed, Jun 02, 2010 at 07:40:07PM +0300, Pasi K=E4rkk=E4inen wrote: > Hello, >=20 > I'm planning to upgrade my testbox and I was checking for hardware opti= ons. > Can someone verify if Intel Xeon E5620 CPU supports (or doesn't support= ) VT-d IOMMU? >=20 > I'm asking because Intel website doesn't mention VT-d for E5620: > http://ark.intel.com/Product.aspx?id=3D47925 >=20 > .. but it does for some (older) CPUs (E5520): > http://ark.intel.com/Product.aspx?id=3D40200 >=20 > The chipset I'm planning to get (Intel 5520 Tylersburg) does have VT-d = / IOMMU support listed. So one thing I didn't know was that you need equivalant number of DMAR entries for the IO-APICs on your motherboard. If you have three IO-APICs = (like, this SuperMicro X8something), you need three DMAR entries - mine only has one. Which means that VT-d is turned off (Xen and both Linux baremetal do this) as it can't do its magic on the other IO-APICs to re-route the I= RQs to the guest. You can hack the code to re-enable it, but then you must disable the x2APIC.