Re: [PATCH][VTD] fixed a timing issue on DELL calpella laptop while doing graphics pass-through

[Jean Guyader <jean.guyader@eu.citrix.com>]

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On Fri, Jun 04, 2010 at 09:30:40PM +0100, Konrad Rzeszutek Wilk wrote:
> > Yes, to take more time to do an FLR on those platform, but I don't think
> > this is a proper fix. The fix we have for that in our tree (XCI) is to make
> > sure the value we write when we restore the pci config space stick in
> > pciback.
> > 
> > I'll send the patch later today,
> 
> Please send it to me as well so I can stick in the proper pv-ops tree.

Thanks Konrad.

Here is the patch for a 2.6.27 kernel.

pciback: Verify write when restoring the pci config space after FLR

Signed-off-by: Jean Guyader <jean.guyader@eu.citrix.com>

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diff --git a/drivers/xen/pciback/pciback_ops.c b/drivers/xen/pciback/pciback_ops.c
index 2b77b31..62267e3 100644
--- a/drivers/xen/pciback/pciback_ops.c
+++ b/drivers/xen/pciback/pciback_ops.c
@@ -56,11 +56,20 @@ void pciback_reload_config_space(struct pci_dev *dev)
 	struct pciback_dev_data *dev_data = pci_get_drvdata(dev);
 	u32 *ptr = (u32*)dev_data->cfg_space;
 	int i, val, count = dev->cfg_size/sizeof(u32);
+        int limit = 0;
 
 	for (i = 0; i < count; i += sizeof(u32), ptr++) {
 		pci_read_config_dword(dev, i, &val);
-		if (val != *ptr)
+		while (limit < 1000 && val != *ptr)
+                {
 			pci_write_config_dword(dev, i, *ptr);
+                        pci_read_config_dword(dev, i, &val);
+                        mdelay(1);
+                        limit++;
+                }
+                if (limit == 1000)
+                    printk(KERN_ERR "pciback: Error reloading config space after flr dev:%x offset:%x\n",
+                            dev->devfn, i);
 	}
 }
 

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