[PATCH] Allow dom0 pstate control to read MSRs

[PATCH] Allow dom0 pstate control to read MSRs

[Mark Langsdorf]

The current version of the powernow driver uses the APERF/MPEF
and the HWCR MSRs.  Add cases in traps.c to let dom0 access 
those MSRs.

--Mark Langsdorf
Operating System Research Center

Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>

diff -r f45026ec8db5 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c	Mon Aug 09 18:29:50 2010 +0100
+++ b/xen/arch/x86/traps.c	Thu Aug 12 16:02:37 2010 -0500
@@ -2228,6 +2228,7 @@
         case MSR_K8_PSTATE5:
         case MSR_K8_PSTATE6:
         case MSR_K8_PSTATE7:
+        case MSR_K8_HWCR:
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD )
                 goto fail;
             if ( !is_cpufreq_controller(v->domain) )
@@ -2267,6 +2268,14 @@
             break;
         case MSR_IA32_MPERF:
         case MSR_IA32_APERF:
+            if (( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ) &&
+                ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ) )
+                goto fail;
+            if ( !is_cpufreq_controller(v->domain) )
+                break;
+            if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
+                goto fail;
+            break;
         case MSR_IA32_PERF_CTL:
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
                 goto fail;