From: Mark Langsdorf <mark.langsdorf@amd.com>
To: xen-devel@lists.xensource.com
Subject: [PATCH][retry 1] Allow dom0 pstate control to read MSRs
Date: Thu, 12 Aug 2010 17:23:56 -0500 [thread overview]
Message-ID: <201008121723.56743.mark.langsdorf@amd.com> (raw)
The current version of the powernow driver uses the APERF/MPEF
and the HWCR MSRs. Add cases in traps.c to let dom0 access
those MSRs.
The previous version used some old code. This version
is correct.
--Mark Langsdorf
Operating System Research Center
Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>
diff -r f45026ec8db5 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c Mon Aug 09 18:29:50 2010 +0100
+++ b/xen/arch/x86/traps.c Thu Aug 12 17:03:53 2010 -0500
@@ -2228,6 +2228,7 @@
case MSR_K8_PSTATE5:
case MSR_K8_PSTATE6:
case MSR_K8_PSTATE7:
+ case MSR_K8_HWCR:
if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD )
goto fail;
if ( !is_cpufreq_controller(v->domain) )
@@ -2267,6 +2268,15 @@
break;
case MSR_IA32_MPERF:
case MSR_IA32_APERF:
+ if (( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ) &&
+ ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ) )
+ goto fail;
+ if ( !is_cpufreq_controller(v->domain) )
+ break;
+ if ( wrmsr_safe(regs->ecx, msr_content ) != 0 )
+ goto fail;
+ break;
+
case MSR_IA32_PERF_CTL:
if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
goto fail;
reply other threads:[~2010-08-12 22:23 UTC|newest]
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