From mboxrd@z Thu Jan  1 00:00:00 1970
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Subject: Re: [PATCH 4 of 4] libxl: Add 'e820_host' option to
	config file
Date: Tue, 24 May 2011 13:52:39 -0400
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To: Ian Jackson <Ian.Jackson@eu.citrix.com>
Cc: xen-devel@lists.xensource.com, Ian.Campbell@citrix.com, stefano.stabellini@eu.citrix.com
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On Tue, May 24, 2011 at 05:59:53PM +0100, Ian Jackson wrote:
> Konrad Rzeszutek Wilk writes ("[Xen-devel] [PATCH 4 of 4] libxl: Add 'e820_host' option to config file"):
> > libxl: Add 'e820_host' option to config file.
> 
> One of these patches, when built on lenny i386, produces this:
> 
> libxl_pci.c: In function 'e820_sanitize':
> libxl_pci.c:1129: error: format '%lx' expects type 'long unsigned int', but argument 9 has type 'uint64_t'
> libxl_pci.c:1129: error: format '%ld' expects type 'long int', but argument 10 has type 'uint64_t'
> libxl_pci.c:1129: error: format '%ld' expects type 'long int', but argument 11 has type 'uint64_t'
> libxl_pci.c:1129: error: format '%lx' expects type 'long unsigned int', but argument 12 has type 'uint64_t'
> libxl_pci.c:1246: error: format '%lx' expects type 'long unsigned int', but argument 8 has type 'uint64_t'
> libxl_pci.c:1246: error: format '%lx' expects type 'long unsigned int', but argument 9 has type 'uint64_t'
> make: *** [libxl_pci.o] Error 1

Duh. Please see the patch below:

# HG changeset patch
# Parent fee83662893a212c67c8f2fb71317e874e61dcd0

diff -r fee83662893a tools/libxl/libxl_pci.c
--- a/tools/libxl/libxl_pci.c	Tue May 24 11:32:17 2011 -0400
+++ b/tools/libxl/libxl_pci.c	Tue May 24 13:49:07 2011 -0400
@@ -1122,10 +1122,10 @@ static int e820_sanitize(libxl_ctx *ctx,
     ram_end = e820[idx].addr + e820[idx].size;
     idx ++;
 
-    LIBXL__LOG(ctx, LIBXL__LOG_DEBUG, "Memory: %ldkB End of RAM: 0x%lx (PFN) " \
-               "Delta: %ldkB, PCI start: %ldkB (0x%lx PFN), Balloon %ldkB\n",
-               map_limitkb, ram_end >> 12, delta_kb, start_kb ,start >> 12,
-               balloon_kb);
+    LIBXL__LOG(ctx, LIBXL__LOG_DEBUG, "Memory: %"PRIu64"kB End of RAM: 0x%"PRIx64" (PFN) " \
+               "Delta: %"PRIu64"kB, PCI start: %"PRIu64"kB (0x%"PRIx64" PFN), Balloon %"PRIu64"kB\n",
+               (uint64_t)map_limitkb, ram_end >> 12, delta_kb, start_kb ,start >> 12,
+               (uint64_t)balloon_kb);
 
 
     /* This whole code below is to guard against if the Intel IGD is passed into
@@ -1242,7 +1242,7 @@ static int e820_sanitize(libxl_ctx *ctx,
     nr = idx;
 
     for (i = 0; i < nr; i++) {
-      LIBXL__LOG(ctx, LIBXL__LOG_DEBUG, ":\t[%lx -> %lx] %s",
+      LIBXL__LOG(ctx, LIBXL__LOG_DEBUG, ":\t[%"PRIx64" -> %"PRIx64"] %s",
                  e820[i].addr >> 12, (e820[i].addr + e820[i].size) >> 12,
                  e820_names(e820[i].type));
     }