From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Wang2 Subject: Re: [PATCH, RFC 5/7] PCI multi-seg: AMD-IOMMU specificadjustments Date: Tue, 6 Sep 2011 13:03:11 +0200 Message-ID: <201109061303.11919.wei.wang2@amd.com> References: <4E567F2A0200007800053475@nat28.tlf.novell.com> <201108261357.57885.wei.wang2@amd.com> <4E64E7BE0200007800054AD6@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <4E64E7BE0200007800054AD6@nat28.tlf.novell.com> Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Jan Beulich Cc: "xen-devel@lists.xensource.com" List-Id: xen-devel@lists.xenproject.org On Monday 05 September 2011 15:16:14 Jan Beulich wrote: > I don't really follow: The two cases where I can't spot where to get the > segment number from are register_exclusion_range_for_all_devices() > and register_exclusion_range_for_device(), both called in the context > of struct acpi_ivmd_block_header(), which only gets a struct > acpi_ivmd_block_header (not having a segment number afaict). OK, now I understand your question. I thought you are question about iommu specification. For these two functions, I think seg = 0 is fine, since amd iommu does not support multiple pci segment other than 0. Also, You could pass acpi_ivhd_block_header to parse_ivmd_block() in function parse_ivrs_block(), since both ivhd and ivmd entries shares the same ivhd header. Thanks, Wei