From: Wei Wang2 <wei.wang2@amd.com>
To: George Dunlap <George.Dunlap@eu.citrix.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>
Subject: Re: AMD IOMMU intremap tables and IOAPICs
Date: Wed, 7 Sep 2011 13:18:33 +0200 [thread overview]
Message-ID: <201109071318.34239.wei.wang2@amd.com> (raw)
In-Reply-To: <CAFLBxZbvogJfQM0vR0dLCA1YmiWnVz90kRs89KXsJ8VdEqvb=g@mail.gmail.com>
On Tuesday 06 September 2011 17:47:59 George Dunlap wrote:
> Wei,
>
> Quick question: Am I reading the code correctly, that even with
> per-device interrupt remap tables, that GSIs are accounted to the
> intremap table of the corresponding IOAPIC, presumably because the
> IOMMU sees interrupts generated as GSIs as coming from the IOAPIC? In
> that case, then we need all devices sharing the same IOAPIC must not
> have any vector collisions. Is that correct?
>
> -George
That is true. All legacy devices have to send interrupts to IOMMU via IOAPIC.
So even we use per-device table. All devices attached to the same IOAPIC will
use the same interrupt table. There should be no vector collisions.
Per-device table only makes sense for MSI devices or systems with multiple
IOAPICs.
Thanks
Wei
prev parent reply other threads:[~2011-09-07 11:18 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-06 15:47 AMD IOMMU intremap tables and IOAPICs George Dunlap
2011-09-06 15:54 ` Andrew Cooper
2011-09-06 15:57 ` George Dunlap
2011-09-06 16:03 ` Andrew Cooper
2011-09-06 16:00 ` George Dunlap
2011-09-06 16:06 ` Tim Deegan
2011-09-06 16:03 ` George Dunlap
2011-09-06 16:13 ` Keir Fraser
2011-09-06 16:25 ` Andrew Cooper
2011-09-07 11:18 ` Wei Wang2 [this message]
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