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From: Tim Deegan <tim@xen.org>
To: Jan Beulich <JBeulich@suse.com>
Cc: Eddie Dong <eddie.dong@intel.com>, xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH v2] vvmx: fix instruction decode segment limit check
Date: Wed, 25 Apr 2012 09:29:21 +0100	[thread overview]
Message-ID: <20120425082921.GA51354@ocelot.phlegethon.org> (raw)
In-Reply-To: <4F97C85B020000780007FDE8@nat28.tlf.novell.com>

At 08:48 +0100 on 25 Apr (1335343691), Jan Beulich wrote:
> - no limit check for 64-bit mode (and GS: is not special in any way)
> - limit check is needed in compatibility mode
> - canonical address check should instead be performed for 64-bit mode
> - the last accessed byte must be within limits, not the first byte past
>   the accessed range
> - segment base address should be ignored for 64-bit mode unless FS: or
>   GS: is in use
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Much clearer, thanks.

Acked-by: Tim Deegan <tim@xen.org>

      reply	other threads:[~2012-04-25  8:29 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-04-25  7:48 [PATCH v2] vvmx: fix instruction decode segment limit check Jan Beulich
2012-04-25  8:29 ` Tim Deegan [this message]

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