From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tim Deegan Subject: Re: [PATCH v2] vvmx: fix instruction decode segment limit check Date: Wed, 25 Apr 2012 09:29:21 +0100 Message-ID: <20120425082921.GA51354@ocelot.phlegethon.org> References: <4F97C85B020000780007FDE8@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <4F97C85B020000780007FDE8@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: Eddie Dong , xen-devel List-Id: xen-devel@lists.xenproject.org At 08:48 +0100 on 25 Apr (1335343691), Jan Beulich wrote: > - no limit check for 64-bit mode (and GS: is not special in any way) > - limit check is needed in compatibility mode > - canonical address check should instead be performed for 64-bit mode > - the last accessed byte must be within limits, not the first byte past > the accessed range > - segment base address should be ignored for 64-bit mode unless FS: or > GS: is in use > > Signed-off-by: Jan Beulich Much clearer, thanks. Acked-by: Tim Deegan