From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mukesh Rathor Subject: Re: [PVH]: Help: msi.c Date: Wed, 12 Dec 2012 17:15:23 -0800 Message-ID: <20121212171523.332a0a89@mantra.us.oracle.com> References: <20121207174636.49c4f7eb@mantra.us.oracle.com> <50C5BCD602000078000AF51A@nat28.tlf.novell.com> <20121210184311.4fc11316@mantra.us.oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Stefano Stabellini Cc: Jan Beulich , xen-devel List-Id: xen-devel@lists.xenproject.org On Tue, 11 Dec 2012 12:10:19 +0000 Stefano Stabellini wrote: > On Tue, 11 Dec 2012, Mukesh Rathor wrote: > > On Mon, 10 Dec 2012 09:43:34 +0000 > > "Jan Beulich" wrote: > > > > > >>> On 08.12.12 at 02:46, Mukesh Rathor > > > >>> wrote: > > > > The second is msi.c. I don't understand it very well, and need > > > > to figure what to do for PVH. Would appreciate suggestions if > > > > anyone knows. > > > > > > Why do you think you need to do something specially for PVH here > > > in the first place? The only adjustment I would expect might be > > > needed is address translation (depending on how PVH deal with > > > MMIO addresses). > > > > Ok, thanks. Looks like I'm missing some address translation > > somewhere, getting EPT violation from dom0. Time to read up more on > > msi-x and debug. > > That's strange because AFAIK Linux is never editing the MSI-X entries > directly: give a look at > arch/x86/pci/xen.c:xen_initdom_setup_msi_irqs, Linux only remaps MSIs > into pirqs using hypercalls. Xen should be the only one to touch the > real MSI-X table. So, this is what's happening. The side effect of : if ( rangeset_add_range(mmio_ro_ranges, dev->msix_table.first, dev->msix_table.last) ) WARN(); if ( rangeset_add_range(mmio_ro_ranges, dev->msix_pba.first, dev->msix_pba.last) ) WARN(); in msix_capability_init() in xen is that the dom0 EPT entries that I've mapped are going from RW to read only. Then when dom0 accesses it, I get EPT violation. In case of pure PV, the PTE entry to access the iomem is RW, and the above rangeset adding doesn't affect it. I don't understand why? Looking into that now... thanks Mukesh