Re: [PATCH 07/11] nEPT: Sync PDPTR fields if L2 guest in PAE paging mode

[Tim Deegan <tim@xen.org>]

At 01:57 +0800 on 11 Dec (1355191039), xiantao.zhang@intel.com wrote:
> From: Zhang Xiantao <xiantao.zhang@intel.com>
> 
> For PAE L2 guest, GUEST_DPPTR registers needs to be synced for each virtual
> vmentry.
> Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
> ---
>  xen/arch/x86/hvm/vmx/vvmx.c |   10 ++++++++--
>  1 files changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
> index ab68b52..3fc128b 100644
> --- a/xen/arch/x86/hvm/vmx/vvmx.c
> +++ b/xen/arch/x86/hvm/vmx/vvmx.c
> @@ -824,9 +824,15 @@ static void load_shadow_guest_state(struct vcpu *v)
>      vvmcs_to_shadow(vvmcs, CR0_READ_SHADOW);
>      vvmcs_to_shadow(vvmcs, CR4_READ_SHADOW);
>      vvmcs_to_shadow(vvmcs, CR0_GUEST_HOST_MASK);
> -    vvmcs_to_shadow(vvmcs, CR4_GUEST_HOST_MASK);

Did you really mean to remove this line as well?  If so, it'll need some
explanation in the checkin description.

Tim.

>  
> -    /* TODO: PDPTRs for nested ept */
> +    if ( nvmx_ept_enabled(v) && hvm_pae_enabled(v) &&
> +                    (v->arch.hvm_vcpu.guest_efer & EFER_LMA) ) {
> +	    vvmcs_to_shadow(vvmcs, GUEST_PDPTR0);
> +	    vvmcs_to_shadow(vvmcs, GUEST_PDPTR1);
> +	    vvmcs_to_shadow(vvmcs, GUEST_PDPTR2);
> +	    vvmcs_to_shadow(vvmcs, GUEST_PDPTR3);
> +    }
> +
>      /* TODO: CR3 target control */
>  }
>  
> -- 
> 1.7.1
> 
> 
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