Re: [PATCH 09/11] nEPT: handle invept instruction from L1 VMM

[Tim Deegan <tim@xen.org>]

At 01:57 +0800 on 11 Dec (1355191041), xiantao.zhang@intel.com wrote:
> From: Zhang Xiantao <xiantao.zhang@intel.com>
> 
> Add the INVEPT instruction emulation logic.
> 
> Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>

Looks fine, but you have some whitespace problems...

> +int nvmx_handle_invept(struct cpu_user_regs *regs)
> +{
> +    struct vmx_inst_decoded decode;
> +    unsigned long eptp;
> +    u64 inv_type;
> +
> +    if ( decode_vmx_inst(regs, &decode, &eptp, 0)
> +             != X86EMUL_OKAY )
> +        return X86EMUL_EXCEPTION;
> +
> +    inv_type = reg_read(regs, decode.reg2);
> +    gdprintk(XENLOG_DEBUG,"inv_type:%ld, eptp:%lx\n", inv_type, eptp);
> +
> +    switch (inv_type){

here

> +    case INVEPT_SINGLE_CONTEXT:
> +        {
> +            struct p2m_domain *p2m = vcpu_nestedhvm(current).nv_p2m;
> +            if ( p2m )
> +            {
> +	            p2m_flush(current, p2m);
> +		        ept_sync_domain(p2m);

and again here (hard tabs)

> +            }
> +        }
> +		break;

and again.

With those fixed, Acked-by: Tim Deegan <tim@xen.org>
(again with the caveat that this isn't under x86/mm)

Cheers,

Tim.