From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mukesh Rathor Subject: Re: [PATCH 10/17] PVH xen: introduce vmx_pvh.c and pvh.c Date: Thu, 9 May 2013 18:51:29 -0700 Message-ID: <20130509185129.593e8b2a@mantra.us.oracle.com> References: <1366752366-16594-1-git-send-email-mukesh.rathor@oracle.com> <1366752366-16594-11-git-send-email-mukesh.rathor@oracle.com> <5177B85B02000078000D03CA@nat28.tlf.novell.com> <20130430175130.7cd4a1e5@mantra.us.oracle.com> <51812C2B0200007800099AF7@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <51812C2B0200007800099AF7@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On Wed, 01 May 2013 14:52:27 +0100 "Jan Beulich" wrote: > >> > +static int vmxit_io_instr(struct cpu_user_regs *regs) > >> > +{ > >> > + int curr_lvl; > >> > + int requested = (regs->rflags >> 12) & 3; > >> > + > >> > + read_vmcs_selectors(regs); > >> > + curr_lvl = regs->cs & 3; > >> > >> Shouldn't you look at SS'es DPL instead? > > > >Ok. It looks like CPL is stored in both CS and SS, so either > >should be ok. But I changed it to ss. > > Your response reads as if you're still looking at the low two bits of > the selector, whereas me using DPL was intended to hint at you > needing to look at the "hidden" portion of the register. Hmm... sorry, still don't understand why I need to use DPL here. Ref'ing the SDM again: Vol1 Basic architecture on IO says: The following instructions can be executed only if the current privilege level (CPL) of the program or task currently executing is less than or equal to the IOPL: IN, INS, OUT, OUTS, CLI .......... It says in Vol 3A in chapter on Protection, that CPL comes from bit 0 and 1 of the CS seg register. Since the RPL relfects the CPL when the program is executing, it seems the above code is correct. Moreover, I don't understand how the desc priv level of stack segement relates to the IO instructions. Here's how the PV check looks btw, in guest_io_okay(): if ( !vm86_mode(regs) && (v->arch.pv_vcpu.iopl >= (guest_kernel_mode(v, regs) ? 1 : 3)) ) what am i missing? thanks mukesh