From mboxrd@z Thu Jan  1 00:00:00 1970
From: Tim Deegan <tim@xen.org>
Subject: Re: [PATCH 10/10] xen: arm: use more specific barriers
	for read and write barriers.
Date: Thu, 4 Jul 2013 12:42:24 +0100
Message-ID: <20130704114224.GL40611@ocelot.phlegethon.org>
References: <1372435809.8976.169.camel@zakaz.uk.xensource.com>
	<1372435856-14040-10-git-send-email-ian.campbell@citrix.com>
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To: Ian Campbell <ian.campbell@citrix.com>
Cc: julien.grall@citrix.com, stefano.stabellini@eu.citrix.com, xen-devel@lists.xen.org
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At 17:10 +0100 on 28 Jun (1372439456), Ian Campbell wrote:
> Note that 32-bit does not provide a load variant of the inner shareable
> barrier, so that remains a full any-any barrier.
> 
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> ---
>  xen/include/asm-arm/system.h |   13 +++++++++----
>  1 files changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/xen/include/asm-arm/system.h b/xen/include/asm-arm/system.h
> index 7c3e42d..efaf645 100644
> --- a/xen/include/asm-arm/system.h
> +++ b/xen/include/asm-arm/system.h
> @@ -17,12 +17,17 @@
>  #define dmb(scope)      asm volatile("dmb " scope : : : "memory")
>  
>  #define mb()            dsb("sy")
> -#define rmb()           dsb("sy")
> -#define wmb()           dsb("sy")
> +#define rmb()           dsb("ld")

This doesn't exist on arm32; it'll have to be dsb("sy") there, just like
you've done for smb_rmb() below.

With that change, Acked-by: Tim Deegan <tim@xen.org>

> +#define wmb()           dsb("st")
>  
>  #define smp_mb()        dmb("ish")
> -#define smp_rmb()       dmb("ish")
> -#define smp_wmb()       dmb("ish")
> +#ifdef CONFIG_ARM_64
> +#define smp_rmb()       dmb("ishld")
> +#else
> +#define smp_rmb()       dmb("ish") /* 32-bit has no ishld variant. */
> +#endif
> +
> +#define smp_wmb()       dmb("ishst")
>  
>  #define xchg(ptr,x) \
>          ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
> -- 
> 1.7.2.5
> 
> 
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