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From: Joby Poriyath <joby.poriyath@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: keir@xen.org, Ian.Campbell@citrix.com,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	xen-devel@lists.xen.org, malcolm.crossley@citrix.com
Subject: Re: [PATCH v2] interrupts: allow guest to set and clear MSI-X mask bit
Date: Tue, 13 Aug 2013 18:08:30 +0100	[thread overview]
Message-ID: <20130813170830.GF27370@citrix.com> (raw)
In-Reply-To: <5200D00202000078000E98A6@nat28.tlf.novell.com>

Hi Jan,

On Tue, Aug 06, 2013 at 09:29:22AM +0100, Jan Beulich wrote:
> >>> On 05.08.13 at 18:03, Andrew Cooper <andrew.cooper3@citrix.com> wrote:
> > On 05/08/13 12:49, Jan Beulich wrote:
> >> But a proper solution would of course be preferred. That may involve
> >> notifying Xen of the reset from the PF driver.
> > 
> > That is making the assumption that the PF driver is even aware that the
> > reset has occurred.  If the PF driver can get at the reset information,
> > I still cant see Xen specific hooks being accepted upstream.
> 
> You sort of contradict your earlier statement here that "the VF
> requests the PF to reset itself" (where you probably meant "it",
> as the VF is hardly allowed to cause a reset of the PF): Such an
> operation should imo be visible to the PF driver.
> 
> And then, even if the reset is being done, shouldn't the interrupt
> setup occur _after_ the reset? Which would make Xen clear the
> flag...
> 
> > Fundamentally, given that only the VM is in a position to actually know
> > about the state of the mask bit (As we cant possibly have Xen polling
> > for the state), then the guest has to have access to the mask bit.
> 
> No, that continues to not be an option as long as Xen uses the mask
> bit itself. Once again, the obvious immediate solution would appear
> to be to carry out the write with the OR of both the guest intended
> and the hypervisor required mask bits, thus allowing the bit to get
> cleared immediately if Xen doesn't need it to be set (and the clearing
> would happen subsequently if Xen needs the flag to be set at the
> point of the guest write). This requires associating back the table
> entry to the IRQ in question (if any), in order to look at
> irq_desc->msi_desc->msi_attrib.masked.

Thanks for the suggestion. 

The reason why guest was allowed to modify MSIX control bit, was to reduce 
the load on qemu-dm (see http://zhenxiao.com/read/SR-IOV.pdf). 

I'll post the updated patch.

> 
> Jan
> 

Thanks,
Joby

      parent reply	other threads:[~2013-08-13 17:08 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-07-19 15:07 [PATCH v2] interrupts: allow guest to set and clear MSI-X mask bit Joby Poriyath
2013-07-19 15:23 ` Konrad Rzeszutek Wilk
2013-07-19 16:07   ` Joby Poriyath
2013-07-19 16:38 ` Malcolm Crossley
2013-07-23 10:54 ` Joby Poriyath
2013-07-23 13:21   ` Andrew Cooper
2013-07-23 13:28   ` Konrad Rzeszutek Wilk
2013-07-23 17:59     ` Joby Poriyath
2013-08-05 10:44       ` Jan Beulich
2013-08-05 11:01         ` Andrew Cooper
2013-08-05 11:49           ` Jan Beulich
2013-08-05 16:03             ` Andrew Cooper
2013-08-06  8:29               ` Jan Beulich
2013-08-06  9:52                 ` Andrew Cooper
2013-08-06 10:17                   ` Jan Beulich
2013-08-06 10:17                   ` Pasi Kärkkäinen
2013-08-06 13:11                     ` Pasi Kärkkäinen
2013-08-13 17:37                       ` Joby Poriyath
2013-08-14 10:11                         ` Jan Beulich
2013-08-13 17:08                 ` Joby Poriyath [this message]

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