From: Olaf Hering <olaf@aepfle.de>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: Keir Fraser <keir@xen.org>,
"Nakajima, Jun" <jun.nakajima@intel.com>,
"Dong, Eddie" <eddie.dong@intel.com>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
"Xu, Dongxiao" <dongxiao.xu@intel.com>,
Jan Beulich <jbeulich@suse.com>,
"Zhang, Yang Z" <yang.z.zhang@intel.com>
Subject: Re: [PATCH] x86/hvm: implement save/restore for posted interrupts
Date: Wed, 16 Jul 2014 16:28:44 +0200 [thread overview]
Message-ID: <20140716142844.GA13820@aepfle.de> (raw)
In-Reply-To: <AADFC41AFE54684AB9EE6CBC0274A5D125FC6896@SHSMSX101.ccr.corp.intel.com>
On Wed, Jul 09, Tian, Kevin wrote:
> > From: Zhang, Yang Z
> > > +++ b/xen/arch/x86/hvm/vlapic.c
> > > @@ -1179,6 +1179,8 @@ static int lapic_save_regs(struct domain *d,
> > > hvm_domain_context_t *h)
> > >
> > > for_each_vcpu ( d, v )
> > > {
> > > + if ( hvm_funcs.sync_pir_to_irr )
> > > + hvm_funcs.sync_pir_to_irr(v);
> > > s = vcpu_vlapic(v);
> > > if ( (rc = hvm_save_entry(LAPIC_REGS, v->vcpu_id, h, s->regs)) !=
> > 0 )
> > > break;
> > > @@ -1230,6 +1232,8 @@ static int lapic_load_regs(struct domain *d,
> > > hvm_domain_context_t *h)
> > > if ( hvm_load_entry(LAPIC_REGS, h, s->regs) != 0 )
> > > return -EINVAL;
> > >
> > > + if ( hvm_funcs.sync_irr_to_pir )
> > > + hvm_funcs.sync_irr_to_pir(v);
> > This is redundant. Interrupt pending in irr will be injected to guest correctly, so
> > there is no need to sync it to pir.
> agree. pending irr has to be injected somewhere after restore, and at that point
> irr->pir has already been covered. otherwise it'd be a more general issue.
> could you try whether only adding sync_pir_to_irr is enough?
It continues to fail if I change just lapic_save_regs.
Olaf
next prev parent reply other threads:[~2014-07-16 14:28 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-03 15:09 [PATCH] x86/hvm: implement save/restore for posted interrupts Olaf Hering
2014-07-03 15:27 ` Jan Beulich
2014-07-09 11:24 ` Zhang, Yang Z
2014-07-09 21:14 ` Tian, Kevin
2014-07-16 14:28 ` Olaf Hering [this message]
2014-07-16 16:11 ` Tian, Kevin
2014-07-17 7:11 ` Olaf Hering
2014-07-17 9:29 ` Zhang, Yang Z
2014-07-18 13:58 ` Olaf Hering
2014-07-22 23:06 ` Zhang, Yang Z
2014-07-23 8:03 ` Olaf Hering
2014-07-25 21:38 ` Tian, Kevin
2014-07-28 6:52 ` Olaf Hering
2014-07-29 7:48 ` Zhang, Yang Z
2014-07-29 8:27 ` Jan Beulich
2014-08-02 10:59 ` Olaf Hering
2014-08-04 1:08 ` Zhang, Yang Z
2014-08-04 7:50 ` Olaf Hering
2014-08-04 7:57 ` Zhang, Yang Z
2014-08-05 10:32 ` Olaf Hering
2014-08-08 0:18 ` Zhang, Yang Z
2014-09-01 6:44 ` Zhang, Yang Z
2014-09-18 3:29 ` Zhang, Yang Z
2014-09-19 13:32 ` Olaf Hering
2014-09-19 13:39 ` Jan Beulich
2014-09-19 17:51 ` Andrew Cooper
2014-09-22 22:43 ` Tian, Kevin
2014-09-24 16:26 ` Malcolm Crossley
2014-09-30 16:19 ` Jan Beulich
2014-10-01 8:07 ` Olaf Hering
2014-10-01 8:29 ` Jan Beulich
2014-10-01 20:13 ` Olaf Hering
2014-10-02 6:51 ` Jan Beulich
2014-10-02 8:10 ` Andrew Cooper
2014-10-02 8:20 ` Olaf Hering
2014-10-08 7:37 ` Zhang, Yang Z
2014-10-08 7:40 ` Olaf Hering
2014-10-08 7:55 ` Zhang, Yang Z
2014-10-08 8:28 ` Olaf Hering
2014-10-08 8:35 ` Zhang, Yang Z
2014-10-08 8:54 ` Olaf Hering
2014-10-09 7:24 ` Zhang, Yang Z
2014-10-09 8:41 ` Fabio Fantoni
2014-10-09 8:43 ` Zhang, Yang Z
2014-10-09 12:49 ` Fabio Fantoni
2014-10-09 11:35 ` Malcolm Crossley
2014-10-09 13:19 ` Andrew Cooper
2014-10-10 0:48 ` Zhang, Yang Z
2014-10-09 13:31 ` Olaf Hering
2014-10-09 14:11 ` Olaf Hering
2014-10-10 0:52 ` Zhang, Yang Z
2014-07-25 9:40 ` Jan Beulich
2014-07-25 12:49 ` Tian, Kevin
2014-07-25 13:59 ` Jan Beulich
2014-07-25 21:31 ` Tian, Kevin
2014-07-28 6:46 ` Jan Beulich
2014-07-28 7:52 ` Wu, Feng
2014-07-28 8:17 ` Zhang, Yang Z
2014-07-28 9:02 ` Jan Beulich
2014-07-28 9:50 ` Liuqiming (John)
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