From mboxrd@z Thu Jan  1 00:00:00 1970
From: Mukesh Rathor <mukesh.rathor@oracle.com>
Subject: Re: [RFH]: AMD CR intercept for lmsw/clts
Date: Tue, 5 Aug 2014 15:22:10 -0700
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To: Jan Beulich <JBeulich@suse.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>, boris.ostrovsky@oracle.com, Aravind.Gopalakrishnan@amd.com, suravee.suthikulpanit@amd.com
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On Tue, 05 Aug 2014 08:46:20 +0100
"Jan Beulich" <JBeulich@suse.com> wrote:

> >>> On 05.08.14 at 03:33, <mukesh.rathor@oracle.com> wrote:
> > Hi,
> > 
> > On AMD, clts/lmsw will cause "mov cr" vmexit, but unlike intel, they
> > can't be handled via svm_vmexit_do_cr_access and are emulated thru
> > handle_mmio() which is a problem for pvh because of:
> > 
.....

> > Or, should I just create a new function for clts/lmsw and call it
> > directly from vmexit switch itself?
> 
> I'd prefer this - it seems pretty ugly to me that handle_mmio()/
> x86_emulate() gets used for this purpose - but am not certain this
> will actually work out nicely for other than CLTS: All the
> instructions currently handled specially are ones with fixed
> operands, and only CLTS fits that.
> 
> You'll btw have the same problem with SMSW and DRx accesses,
> string I/O instructions, as well as (on older CPUs) with moves to/from
> CRx and INVLPG.

I see, I'd be duplicating from x86_emulate more than just couple cases, so
I think the best thing would be to just call x86_emulate directly, which
is what should've been done in the first place for the CR intercepts. 

BTW, as regards INVLPG, I'm *requiring* svm decode for pvh.

thanks,
Mukesh