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From: Wei Liu <wei.liu2@citrix.com>
To: Ross Lagerwall <ross.lagerwall@citrix.com>
Cc: Kevin Tian <kevin.tian@intel.com>, Keir Fraser <keir@xen.org>,
	Jan Beulich <jbeulich@suse.com>,
	George Dunlap <george.dunlap@eu.citrix.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Eddie Dong <eddie.dong@intel.com>,
	xen-devel@lists.xen.org, Kai Huang <kai.huang@linux.intel.com>,
	Jun Nakajima <jun.nakajima@intel.com>,
	Wei Liu <wei.liu2@citrix.com>
Subject: Re: [PATCH for-4.6] p2m/ept: Set the A bit only if PML is enabled
Date: Wed, 16 Sep 2015 15:46:25 +0100	[thread overview]
Message-ID: <20150916144625.GD20876@zion.uk.xensource.com> (raw)
In-Reply-To: <1442393271-12388-1-git-send-email-ross.lagerwall@citrix.com>

On Wed, Sep 16, 2015 at 09:47:51AM +0100, Ross Lagerwall wrote:
> Since commit 191b3f3344ee ("p2m/ept: enable PML in p2m-ept for
> log-dirty"), the A and D bits of EPT paging entries are set
> unconditionally, regardless of whether PML is enabled or not. This
> causes a regression in Xen 4.6 on some processors due to Intel Errata
> AVR41 -- HVM guests get severe memory corruption when the A bit is
> set. The errata affects the Atom C2000 family (Avaton).
> 
> Instead, only set the bits if PML is enabled.

I think we need to make clear that this is working around hardware issue
because there is nothing fundamentally wrong with setting those bits?
I.e. I want to distinguish bug fix from workaround, this would certainly
affect the judgement on this patch.

Correct me if I'm wrong. Do you not need to disallow using PML on such
platform?  What would happen with your patch on a broken platform that
has PML enabled?  I think PML wouldn't work, xen is broken in another
way, but user won't get any visibility why it doesn't work, which is not
nice.

Wei.

  reply	other threads:[~2015-09-16 14:46 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-16  8:47 [PATCH for-4.6] p2m/ept: Set the A bit only if PML is enabled Ross Lagerwall
2015-09-16 14:46 ` Wei Liu [this message]
2015-09-16 15:17   ` Ross Lagerwall
2015-09-16 15:23     ` Wei Liu
2015-09-16 19:47 ` Andrew Cooper
2015-09-21 12:30   ` Jan Beulich
2015-09-21 14:33   ` Tim Deegan
2015-09-23 15:18 ` Wei Liu
2015-09-23 15:28   ` Konrad Rzeszutek Wilk
2015-09-23 15:43   ` George Dunlap
2015-09-23 15:46   ` Tim Deegan
2015-09-24  7:02     ` Jan Beulich
2015-09-24  9:10       ` Tim Deegan
2015-09-24  9:13         ` Andrew Cooper
2015-09-24  9:20           ` Tim Deegan
2015-09-24  9:41           ` Jan Beulich
2015-09-24  9:33         ` Jan Beulich
2015-09-24 10:45           ` Wei Liu
2015-09-24 10:49             ` Wei Liu
2015-09-28  8:42         ` Kai Huang

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