From mboxrd@z Thu Jan 1 00:00:00 1970 From: Haozhong Zhang Subject: Re: [PATCH v2 1/2] x86/hvm: allow guest to use clflushopt and clwb Date: Fri, 8 Jan 2016 16:27:14 +0800 Message-ID: <20160108082714.GC3828@hz-desktop.sh.intel.com> References: <1451476139-22148-1-git-send-email-haozhong.zhang@intel.com> <1451476139-22148-2-git-send-email-haozhong.zhang@intel.com> <568E7AFF02000078000C46BA@prv-mh.provo.novell.com> <568E6FD2.1070008@citrix.com> <568E858E02000078000C4716@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <568E858E02000078000C4716@prv-mh.provo.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: Kevin Tian , Wei Liu , IanCampbell , Stefano Stabellini , Andrew Cooper , Ian Jackson , xen-devel@lists.xen.org, Jun Nakajima , Keir Fraser List-Id: xen-devel@lists.xenproject.org On 01/07/16 07:34, Jan Beulich wrote: > >>> On 07.01.16 at 15:01, wrote: > > On 07/01/16 13:49, Jan Beulich wrote: > >>>>> On 30.12.15 at 12:48, wrote: > >>> --- a/xen/arch/x86/hvm/hvm.c > >>> +++ b/xen/arch/x86/hvm/hvm.c > >>> @@ -4583,21 +4583,30 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, > > unsigned int *ebx, > >>> *edx &= ~cpufeat_mask(X86_FEATURE_PSE36); > >>> break; > >>> case 0x7: > >>> - if ( (count == 0) && !cpu_has_smep ) > >>> - *ebx &= ~cpufeat_mask(X86_FEATURE_SMEP); > >>> + if ( count == 0 ) > >>> + { > >>> + if ( !cpu_has_smep ) > >>> + *ebx &= ~cpufeat_mask(X86_FEATURE_SMEP); > >>> + > >>> + if ( !cpu_has_smap ) > >>> + *ebx &= ~cpufeat_mask(X86_FEATURE_SMAP); > >>> + > >>> + /* Don't expose MPX to hvm when VMX support is not available */ > >>> + if ( !(vmx_vmexit_control & VM_EXIT_CLEAR_BNDCFGS) || > >>> + !(vmx_vmentry_control & VM_ENTRY_LOAD_BNDCFGS) ) > >>> + *ebx &= ~cpufeat_mask(X86_FEATURE_MPX); > >>> > >>> - if ( (count == 0) && !cpu_has_smap ) > >>> - *ebx &= ~cpufeat_mask(X86_FEATURE_SMAP); > >>> + /* Don't expose INVPCID to non-hap hvm. */ > >>> + if ( !hap_enabled(d) ) > >>> + *ebx &= ~cpufeat_mask(X86_FEATURE_INVPCID); > >>> > >>> - /* Don't expose MPX to hvm when VMX support is not available */ > >>> - if ( (count == 0) && > >>> - (!(vmx_vmexit_control & VM_EXIT_CLEAR_BNDCFGS) || > >>> - !(vmx_vmentry_control & VM_ENTRY_LOAD_BNDCFGS)) ) > >>> - *ebx &= ~cpufeat_mask(X86_FEATURE_MPX); > >>> + if ( !cpu_has_clflushopt ) > >>> + *ebx &= ~cpufeat_mask(X86_FEATURE_CLFLUSHOPT); > >>> + > >>> + if ( !cpu_has_clwb ) > >>> + *ebx &= ~cpufeat_mask(X86_FEATURE_CLWB); > >> I don't think we need this: Other than other things adjusted here, > >> there's nothing disabling these two features when found available, > >> and there are no extra conditions to consider. Otherwise, if we > >> were to follow this route, quite a bit of code would need to be > >> added to other case statements in this function. But that's all (I > >> think) going to be taken care of by Andrew's CPUID leveling series. > > > > My series does take care of all of this. > > > > I would prefer that these two changes get taken as soon as they are > > ready, so I can rebase. > > If we don't need the change quoted above, your rebase will actually > be easier to do. > > Jan > I'll remove changes in hvm_cpuid() in the next version. Changes in xen/include/asm-x86/cpufeature.h will be removed as well, because there will be no use of them. Haozhong