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* [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD
@ 2016-07-22 17:14 Boris Ostrovsky
  2016-07-22 17:38 ` Wei Liu
  0 siblings, 1 reply; 7+ messages in thread
From: Boris Ostrovsky @ 2016-07-22 17:14 UTC (permalink / raw)
  To: xen-devel; +Cc: wei.liu2, boris.ostrovsky, ian.jackson

Current code incorrectly adds 1 to full register instead of
incrementing the field in bits 15:12.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
---
 tools/libxc/xc_cpuid_x86.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index 84f4e08..fbbac9e 100644
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -331,7 +331,8 @@ static void amd_xc_cpuid_policy(xc_interface *xch,
          * ECX[15:12] is ApicIdCoreSize: ECX[7:0] is NumberOfCores (minus one).
          * Update to reflect vLAPIC_ID = vCPU_ID * 2.
          */
-        regs[2] = ((regs[2] & 0xf000u) + 1) | ((regs[2] & 0xffu) << 1) | 1u;
+        regs[2] = ((regs[2] + (1u << 12)) & 0xf000u) |
+                  ((regs[2] & 0xffu) << 1) | 1u;
         break;
 
     case 0x8000000a: {
-- 
1.8.3.1


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^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD
  2016-07-22 17:14 [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD Boris Ostrovsky
@ 2016-07-22 17:38 ` Wei Liu
  2016-07-22 17:45   ` Boris Ostrovsky
  0 siblings, 1 reply; 7+ messages in thread
From: Wei Liu @ 2016-07-22 17:38 UTC (permalink / raw)
  To: Boris Ostrovsky; +Cc: wei.liu2, ian.jackson, xen-devel

On Fri, Jul 22, 2016 at 01:14:01PM -0400, Boris Ostrovsky wrote:
> Current code incorrectly adds 1 to full register instead of
> incrementing the field in bits 15:12.
> 
> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>

Acked-by: Wei Liu <wei.liu2@citrix.com>

I trust your expertise in this field. :-)

> ---
>  tools/libxc/xc_cpuid_x86.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
> index 84f4e08..fbbac9e 100644
> --- a/tools/libxc/xc_cpuid_x86.c
> +++ b/tools/libxc/xc_cpuid_x86.c
> @@ -331,7 +331,8 @@ static void amd_xc_cpuid_policy(xc_interface *xch,
>           * ECX[15:12] is ApicIdCoreSize: ECX[7:0] is NumberOfCores (minus one).
>           * Update to reflect vLAPIC_ID = vCPU_ID * 2.
>           */
> -        regs[2] = ((regs[2] & 0xf000u) + 1) | ((regs[2] & 0xffu) << 1) | 1u;
> +        regs[2] = ((regs[2] + (1u << 12)) & 0xf000u) |
> +                  ((regs[2] & 0xffu) << 1) | 1u;
>          break;
>  
>      case 0x8000000a: {
> -- 
> 1.8.3.1
> 

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD
  2016-07-22 17:38 ` Wei Liu
@ 2016-07-22 17:45   ` Boris Ostrovsky
  2016-07-22 17:50     ` Wei Liu
  0 siblings, 1 reply; 7+ messages in thread
From: Boris Ostrovsky @ 2016-07-22 17:45 UTC (permalink / raw)
  To: Wei Liu; +Cc: ian.jackson, xen-devel

On 07/22/2016 01:38 PM, Wei Liu wrote:
> On Fri, Jul 22, 2016 at 01:14:01PM -0400, Boris Ostrovsky wrote:
>> Current code incorrectly adds 1 to full register instead of
>> incrementing the field in bits 15:12.
>>
>> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
> Acked-by: Wei Liu <wei.liu2@citrix.com>
>
> I trust your expertise in this field. :-)


Just in this field? The field is only 4 bits! ;-)

But this actually fixes a regression that was triggered by recent
hvmloader change on one particular processor that we have in the test farm.

-boris

>
>> ---
>>  tools/libxc/xc_cpuid_x86.c | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
>> index 84f4e08..fbbac9e 100644
>> --- a/tools/libxc/xc_cpuid_x86.c
>> +++ b/tools/libxc/xc_cpuid_x86.c
>> @@ -331,7 +331,8 @@ static void amd_xc_cpuid_policy(xc_interface *xch,
>>           * ECX[15:12] is ApicIdCoreSize: ECX[7:0] is NumberOfCores (minus one).
>>           * Update to reflect vLAPIC_ID = vCPU_ID * 2.
>>           */
>> -        regs[2] = ((regs[2] & 0xf000u) + 1) | ((regs[2] & 0xffu) << 1) | 1u;
>> +        regs[2] = ((regs[2] + (1u << 12)) & 0xf000u) |
>> +                  ((regs[2] & 0xffu) << 1) | 1u;
>>          break;
>>  
>>      case 0x8000000a: {
>> -- 
>> 1.8.3.1
>>


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD
  2016-07-22 17:45   ` Boris Ostrovsky
@ 2016-07-22 17:50     ` Wei Liu
  2016-07-25 11:33       ` Ian Jackson
  0 siblings, 1 reply; 7+ messages in thread
From: Wei Liu @ 2016-07-22 17:50 UTC (permalink / raw)
  To: Boris Ostrovsky; +Cc: ian.jackson, Wei Liu, xen-devel

On Fri, Jul 22, 2016 at 01:45:05PM -0400, Boris Ostrovsky wrote:
> On 07/22/2016 01:38 PM, Wei Liu wrote:
> > On Fri, Jul 22, 2016 at 01:14:01PM -0400, Boris Ostrovsky wrote:
> >> Current code incorrectly adds 1 to full register instead of
> >> incrementing the field in bits 15:12.
> >>
> >> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
> > Acked-by: Wei Liu <wei.liu2@citrix.com>
> >
> > I trust your expertise in this field. :-)
> 
> 
> Just in this field? The field is only 4 bits! ;-)
> 

No, it's only one bit! :-P

> But this actually fixes a regression that was triggered by recent
> hvmloader change on one particular processor that we have in the test farm.

Ian, this is a backport candidate and needs to go back as far as
possible. The bogus calculation was introduced in 2008 (!). 

Wei.

> 
> -boris
> 
> >
> >> ---
> >>  tools/libxc/xc_cpuid_x86.c | 3 ++-
> >>  1 file changed, 2 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
> >> index 84f4e08..fbbac9e 100644
> >> --- a/tools/libxc/xc_cpuid_x86.c
> >> +++ b/tools/libxc/xc_cpuid_x86.c
> >> @@ -331,7 +331,8 @@ static void amd_xc_cpuid_policy(xc_interface *xch,
> >>           * ECX[15:12] is ApicIdCoreSize: ECX[7:0] is NumberOfCores (minus one).
> >>           * Update to reflect vLAPIC_ID = vCPU_ID * 2.
> >>           */
> >> -        regs[2] = ((regs[2] & 0xf000u) + 1) | ((regs[2] & 0xffu) << 1) | 1u;
> >> +        regs[2] = ((regs[2] + (1u << 12)) & 0xf000u) |
> >> +                  ((regs[2] & 0xffu) << 1) | 1u;
> >>          break;
> >>  
> >>      case 0x8000000a: {
> >> -- 
> >> 1.8.3.1
> >>
> 

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD
  2016-07-22 17:50     ` Wei Liu
@ 2016-07-25 11:33       ` Ian Jackson
  2016-07-25 13:22         ` Wei Liu
  0 siblings, 1 reply; 7+ messages in thread
From: Ian Jackson @ 2016-07-25 11:33 UTC (permalink / raw)
  To: Wei Liu; +Cc: Boris Ostrovsky, xen-devel

Wei Liu writes ("Re: [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD"):
> On Fri, Jul 22, 2016 at 01:45:05PM -0400, Boris Ostrovsky wrote:
> > On 07/22/2016 01:38 PM, Wei Liu wrote:
> > But this actually fixes a regression that was triggered by recent
> > hvmloader change on one particular processor that we have in the test farm.
> 
> Ian, this is a backport candidate and needs to go back as far as
> possible. The bogus calculation was introduced in 2008 (!). 

Thanks, but:

Not queued for backport because the patch is not in staging.

Thanks,
Ian.

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD
  2016-07-25 11:33       ` Ian Jackson
@ 2016-07-25 13:22         ` Wei Liu
  2016-07-26 10:00           ` Ian Jackson
  0 siblings, 1 reply; 7+ messages in thread
From: Wei Liu @ 2016-07-25 13:22 UTC (permalink / raw)
  To: Ian Jackson; +Cc: Boris Ostrovsky, Wei Liu, xen-devel

On Mon, Jul 25, 2016 at 12:33:37PM +0100, Ian Jackson wrote:
> Wei Liu writes ("Re: [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD"):
> > On Fri, Jul 22, 2016 at 01:45:05PM -0400, Boris Ostrovsky wrote:
> > > On 07/22/2016 01:38 PM, Wei Liu wrote:
> > > But this actually fixes a regression that was triggered by recent
> > > hvmloader change on one particular processor that we have in the test farm.
> > 
> > Ian, this is a backport candidate and needs to go back as far as
> > possible. The bogus calculation was introduced in 2008 (!). 
> 
> Thanks, but:
> 
> Not queued for backport because the patch is not in staging.
> 

Pushed to staging.

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD
  2016-07-25 13:22         ` Wei Liu
@ 2016-07-26 10:00           ` Ian Jackson
  0 siblings, 0 replies; 7+ messages in thread
From: Ian Jackson @ 2016-07-26 10:00 UTC (permalink / raw)
  To: Wei Liu; +Cc: Boris Ostrovsky, xen-devel

Wei Liu writes ("Re: [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD"):
> On Mon, Jul 25, 2016 at 12:33:37PM +0100, Ian Jackson wrote:
> > Wei Liu writes ("Re: [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD"):
> > > Ian, this is a backport candidate and needs to go back as far as
> > > possible. The bogus calculation was introduced in 2008 (!). 
> 
> Pushed to staging.

Thanks, queued.

Ian.

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^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2016-07-26 10:00 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-07-22 17:14 [PATCH] tools/libxc: Properly increment ApicIdCoreSize field on AMD Boris Ostrovsky
2016-07-22 17:38 ` Wei Liu
2016-07-22 17:45   ` Boris Ostrovsky
2016-07-22 17:50     ` Wei Liu
2016-07-25 11:33       ` Ian Jackson
2016-07-25 13:22         ` Wei Liu
2016-07-26 10:00           ` Ian Jackson

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