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From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: xen-devel@lists.xenproject.org
Subject: Re: PCIe devices that are hotplugged after MMIO has been setup fail due to _CRS not covering 64-bit area
Date: Wed, 28 Sep 2016 05:52:54 -0400	[thread overview]
Message-ID: <20160928095253.GA20125@localhost.localdomain> (raw)
In-Reply-To: <57EBA7A402000078001132F6@prv-mh.provo.novell.com>

On Wed, Sep 28, 2016 at 03:21:08AM -0600, Jan Beulich wrote:
> >>> On 27.09.16 at 16:43, <konrad.wilk@oracle.com> wrote:
> > If the guest is booted with 'pci' we nicely expand the MMIO region below
> > 4GB and try to fit in the BARs in there. If that fails (not enough
> > space) we move it above the memory (64-bit). And throughout all of this
> > we also update the _CRS field to cover these ranges.
> > 
> > (Note, I need to check if the 64-bit area is also set, I think it is).
> > 
> > But the situation is different if we hot-plug a device that has too big
> > BAR to fit in the MMIO region. We move it in the 64-bit area but we
> > don't update the _CRS. Which means that Linux will complain (unless
> > booted with pci=nocrs)). Not sure about Windows but I would assume so
> > to.
> > 
> > I was wondering what would be a good way to solve this? I looked at some
> > Dell machines to see how they deal with hotplug PCIe devices and they
> > just declared all the memory in the _CRS (including RAM).
> > 
> > We could do a hybrid - during bootup make the _CRS region have entry from
> > end of RAM to .. end of memory?
> 
> End of physical address space you mean? Generally yes, but we

Yes.
> need to be a little careful there: For one, on AMD we'd better not
> overlap with the HT area. And then there's this MTRR related
> comment next to the setting of pci_hi_mem_end (albeit both HT
> area start and end of PA space should be aligned well enough).

<nods>
> 
> > Or perhaps add some extra logic between QEMU and ACPI AML to expand (or
> > perhaps modify the last _CRS entry) when PCIe devices are hotplugged?
> 
> While that would be the most flexible variant, I'd be afraid of this
> getting rather complicated. Or have you already got some
> reasonable layout of how this would look like?

Nothing yet sadly, just soliciting input at this point.

Thanks again for the tidbit about HT.
> 
> Jan
> 

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  reply	other threads:[~2016-09-28  9:53 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-27 14:43 PCIe devices that are hotplugged after MMIO has been setup fail due to _CRS not covering 64-bit area Konrad Rzeszutek Wilk
2016-09-28  9:21 ` Jan Beulich
2016-09-28  9:52   ` Konrad Rzeszutek Wilk [this message]
2016-10-12 21:15   ` Konrad Rzeszutek Wilk
2016-10-13  9:20     ` Jan Beulich
2016-11-01 14:39       ` Konrad Rzeszutek Wilk
2016-11-01 14:56         ` Konrad Rzeszutek Wilk
2016-11-02 10:14         ` Jan Beulich

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