From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: xen-devel@lists.xenproject.org
Subject: Re: PCIe devices that are hotplugged after MMIO has been setup fail due to _CRS not covering 64-bit area
Date: Tue, 1 Nov 2016 10:56:12 -0400 [thread overview]
Message-ID: <20161101145612.GC9485@char.us.oracle.com> (raw)
In-Reply-To: <20161101143927.GA8950@char.us.oracle.com>
. snip..
> I modified it be subtractive, and got it to start with
> large areas and then smaller and smaller:
>
> (d2) - CPU0 ... 36-bit phys ... fixed MTRRs ... Cover @000004344(MB) to 000065536(M
> (d2) B) with 7 MTRRs.
> (d2) MTRR 1 @000004344(MB) 000037112(MB)
> (d2) MTRR 2 @000037112(MB) 000053496(MB)
> (d2) MTRR 3 @000053496(MB) 000061688(MB)
> (d2) MTRR 4 @000061688(MB) 000063736(MB)
> (d2) MTRR 5 @000063736(MB) 000064760(MB)
> (d2) MTRR 6 @000064760(MB) 000065272(MB)
> (d2) MTRR 7 @000065272(MB) 000065528(MB)
> (d2) var MTRRs [8/8] ... done.
>
> But of course on 48-bit hardware, even with this we ran out of MTRRs:
> (d1) - CPU0 ... 48-bit phys ... fixed MTRRs ... Cover @000004344(MB) to 0268435456(
> (d1) MB) with 7 MTRRs.
> (d1) MTRR 1 @000004344(MB) 0134222072(MB)
> (d1) MTRR 2 @0134222072(MB) 0201330936(MB)
> (d1) MTRR 3 @0201330936(MB) 0234885368(MB)
> (d1) MTRR 4 @0234885368(MB) 0251662584(MB)
> (d1) MTRR 5 @0251662584(MB) 0260051192(MB)
> (d1) MTRR 6 @0260051192(MB) 0264245496(MB)
> (d1) MTRR 7 @0264245496(MB) 0266342648(MB)
> (d1) var MTRRs [8/8] ... done.
For comparison here is what the existing code does (pls ignore the 'MTRR 1'):
(d35) MB) with 7 MTRRs.
(d35) MTRR 1 @000004344(MB) 000004352(MB) [000000008(MB)]
(d35) MTRR 1 @000004352(MB) 000004608(MB) [000000256(MB)]
(d35) MTRR 1 @000004608(MB) 000005120(MB) [000000512(MB)]
(d35) MTRR 1 @000005120(MB) 000006144(MB) [000001024(MB)]
(d35) MTRR 1 @000006144(MB) 000008192(MB) [000002048(MB)]
(d35) MTRR 1 @000008192(MB) 000016384(MB) [000008192(MB)]
(d35) MTRR 1 @000016384(MB) 000032768(MB) [000016384(MB)]
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next prev parent reply other threads:[~2016-11-01 14:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-27 14:43 PCIe devices that are hotplugged after MMIO has been setup fail due to _CRS not covering 64-bit area Konrad Rzeszutek Wilk
2016-09-28 9:21 ` Jan Beulich
2016-09-28 9:52 ` Konrad Rzeszutek Wilk
2016-10-12 21:15 ` Konrad Rzeszutek Wilk
2016-10-13 9:20 ` Jan Beulich
2016-11-01 14:39 ` Konrad Rzeszutek Wilk
2016-11-01 14:56 ` Konrad Rzeszutek Wilk [this message]
2016-11-02 10:14 ` Jan Beulich
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