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* [PATCH] x86emul: suppress alignment check for {, v}mov{d, q}
@ 2016-11-10 12:29 Jan Beulich
  2016-11-11 15:36 ` Andrew Cooper
  0 siblings, 1 reply; 3+ messages in thread
From: Jan Beulich @ 2016-11-10 12:29 UTC (permalink / raw)
  To: xen-devel; +Cc: Andrew Cooper, Wei Liu

[-- Attachment #1: Type: text/plain, Size: 598 bytes --]

When introducing support for these instructions, adjustment for the
alignment check logic (generating #GP(0)) was overlooked.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -4940,7 +4940,7 @@ x86_emulate(
         {
             uint32_t mxcsr = 0;
 
-            if ( vex.pfx != vex_66 )
+            if ( ea.bytes < 16 || vex.pfx == vex_f3 )
                 mxcsr = MXCSR_MM;
             else if ( vcpu_has_misalignsse() )
                 asm ( "stmxcsr %0" : "=m" (mxcsr) );




[-- Attachment #2: x86emul-movq-no-align.patch --]
[-- Type: text/plain, Size: 646 bytes --]

x86emul: suppress alignment check for {,v}mov{d,q}

When introducing support for these instructions, adjustment for the
alignment check logic (generating #GP(0)) was overlooked.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -4940,7 +4940,7 @@ x86_emulate(
         {
             uint32_t mxcsr = 0;
 
-            if ( vex.pfx != vex_66 )
+            if ( ea.bytes < 16 || vex.pfx == vex_f3 )
                 mxcsr = MXCSR_MM;
             else if ( vcpu_has_misalignsse() )
                 asm ( "stmxcsr %0" : "=m" (mxcsr) );

[-- Attachment #3: Type: text/plain, Size: 127 bytes --]

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^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2016-11-12  6:45 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2016-11-10 12:29 [PATCH] x86emul: suppress alignment check for {, v}mov{d, q} Jan Beulich
2016-11-11 15:36 ` Andrew Cooper
2016-11-12  6:45   ` Wei Liu

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