From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Artem Mygaiev <joculator@gmail.com>
Cc: Oleks Tysh <olekstysh@gmail.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
embedded-pv-devel@lists.xenproject.org,
xen-devel@lists.xensource.com,
Andrii Anisov <andrii.anisov@gmail.com>
Subject: Re: [RFC] Shared coprocessor framework
Date: Tue, 15 Nov 2016 14:23:01 -0500 [thread overview]
Message-ID: <20161115192301.GD9147@char.us.oracle.com> (raw)
In-Reply-To: <CAJwc6Kt7_70+j7FCza7i-8+X9OhfY2cXT-w-2DBEQ6yMv=Dqng@mail.gmail.com>
On Sat, Nov 12, 2016 at 02:04:25PM +0200, Artem Mygaiev wrote:
> On Fri, Nov 11, 2016 at 10:43 PM, Konrad Rzeszutek Wilk
> <konrad.wilk@oracle.com> wrote:
> > Does this also mean that the hypervisor has to know the co-processors?
> > As in how to start/stop them? And how to tell them to save/restore
> > guest context? Or is there some generic specification for doing this?
>
> Unfortunately there is be no single way to switch context on
> co-processors, so yes, hypervisor has to know the co-processors.
> The situation is not as bad as having full-scope driver (which is
> implemented in some proprietary hypervisors), we only need to:
> 1. stop
> 2. flush registers
> 3. switch memory context <--- implemented by SMMU in ARM
> 4. restore registers
> 5. start
So it looks like there could be an generic API to deal with
these various operations. And I think you are thinking to hook
it up to the scheduler so that when a guest switches you can
follow with that (similar to how Intel IOMMU VT-x Posted Interrupts
are done). But I think the design also mentioned asynchronous
jobs so there may be situations where there is a doorbell
to wake up an guest?
But I think in my x86 poisioned PoV mind this is similar to an
PCIe device that has its own MMU.
Which brings some more questions - how do we erect the barriers
such that this "coprocessor" does not destabilize the system
incase the firmware on the "coprocessors" ends up blowing up?
Are there some other operations to allow the coprocessors
only to touch specific memory regions?
Thanks.
>
> Best regards,
> Artem Mygaiev
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next prev parent reply other threads:[~2016-11-15 19:23 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-28 17:53 [RFC] Shared coprocessor framework Andrii Anisov
2016-10-28 18:38 ` Andrew Cooper
2016-10-31 19:31 ` Andrii Anisov
2016-11-01 13:57 ` Artem Mygaiev
2016-11-03 11:31 ` Andrii Anisov
2016-11-11 20:43 ` Konrad Rzeszutek Wilk
2016-11-12 12:04 ` Artem Mygaiev
2016-11-15 19:23 ` Konrad Rzeszutek Wilk [this message]
2016-11-16 13:42 ` Andrii Anisov
2016-11-16 12:39 ` Andrii Anisov
2016-11-22 1:50 ` Stefano Stabellini
2016-11-23 13:54 ` Andrii Anisov
2016-11-23 18:56 ` Stefano Stabellini
2016-11-23 19:07 ` Andrii Anisov
2016-11-23 19:23 ` Andrii Anisov
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