From: Roger Pau Monne <roger.pau@citrix.com>
To: xen-devel@lists.xenproject.org
Cc: Kevin Tian <kevin.tian@intel.com>,
Jan Beulich <jbeulich@suse.com>,
konrad.wilk@oracle.com,
George Dunlap <george.dunlap@eu.citrix.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Jun Nakajima <jun.nakajima@intel.com>,
boris.ostrovsky@oracle.com,
Roger Pau Monne <roger.pau@citrix.com>
Subject: [PATCH v5 2/9] x86/iommu: add IOMMU entries for p2m_mmio_direct pages
Date: Thu, 19 Jan 2017 17:29:34 +0000 [thread overview]
Message-ID: <20170119172941.65642-3-roger.pau@citrix.com> (raw)
In-Reply-To: <20170119172941.65642-1-roger.pau@citrix.com>
There's nothing wrong with allowing the domain to perform DMA transfers to
MMIO areas that it already can access from the CPU, and this allows us to
remove the hack in set_identity_p2m_entry for PVH Dom0.
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
Cc: Jun Nakajima <jun.nakajima@intel.com>
Cc: Kevin Tian <kevin.tian@intel.com>
Cc: George Dunlap <george.dunlap@eu.citrix.com>
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
---
Changes since v4:
- Check for mmio_ro_ranges, this requires passing the mfn to the function, and
fixing the callers.
---
xen/arch/x86/mm/p2m-ept.c | 5 +++--
xen/arch/x86/mm/p2m-pt.c | 17 ++++++++++-------
xen/arch/x86/mm/p2m.c | 9 ---------
xen/include/asm-x86/p2m.h | 6 +++++-
4 files changed, 18 insertions(+), 19 deletions(-)
diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 13cab24..0e316ba 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -672,7 +672,7 @@ ept_set_entry(struct p2m_domain *p2m, unsigned long gfn, mfn_t mfn,
uint8_t ipat = 0;
bool_t need_modify_vtd_table = 1;
bool_t vtd_pte_present = 0;
- unsigned int iommu_flags = p2m_get_iommu_flags(p2mt);
+ unsigned int iommu_flags = p2m_get_iommu_flags(p2mt, mfn);
bool_t needs_sync = 1;
ept_entry_t old_entry = { .epte = 0 };
ept_entry_t new_entry = { .epte = 0 };
@@ -798,7 +798,8 @@ ept_set_entry(struct p2m_domain *p2m, unsigned long gfn, mfn_t mfn,
/* Safe to read-then-write because we hold the p2m lock */
if ( ept_entry->mfn == new_entry.mfn &&
- p2m_get_iommu_flags(ept_entry->sa_p2mt) == iommu_flags )
+ p2m_get_iommu_flags(ept_entry->sa_p2mt, _mfn(ept_entry->mfn)) ==
+ iommu_flags )
need_modify_vtd_table = 0;
ept_p2m_type_to_flags(p2m, &new_entry, p2mt, p2ma);
diff --git a/xen/arch/x86/mm/p2m-pt.c b/xen/arch/x86/mm/p2m-pt.c
index 3b025d5..a23d0bd 100644
--- a/xen/arch/x86/mm/p2m-pt.c
+++ b/xen/arch/x86/mm/p2m-pt.c
@@ -499,7 +499,7 @@ p2m_pt_set_entry(struct p2m_domain *p2m, unsigned long gfn, mfn_t mfn,
l2_pgentry_t l2e_content;
l3_pgentry_t l3e_content;
int rc;
- unsigned int iommu_pte_flags = p2m_get_iommu_flags(p2mt);
+ unsigned int iommu_pte_flags = p2m_get_iommu_flags(p2mt, mfn);
/*
* old_mfn and iommu_old_flags control possible flush/update needs on the
* IOMMU: We need to flush when MFN or flags (i.e. permissions) change.
@@ -565,9 +565,10 @@ p2m_pt_set_entry(struct p2m_domain *p2m, unsigned long gfn, mfn_t mfn,
{
if ( flags & _PAGE_PSE )
{
- iommu_old_flags =
- p2m_get_iommu_flags(p2m_flags_to_type(flags));
old_mfn = l1e_get_pfn(*p2m_entry);
+ iommu_old_flags =
+ p2m_get_iommu_flags(p2m_flags_to_type(flags),
+ _mfn(old_mfn));
}
else
{
@@ -609,9 +610,10 @@ p2m_pt_set_entry(struct p2m_domain *p2m, unsigned long gfn, mfn_t mfn,
p2m_entry = p2m_find_entry(table, &gfn_remainder, gfn,
0, L1_PAGETABLE_ENTRIES);
ASSERT(p2m_entry);
- iommu_old_flags =
- p2m_get_iommu_flags(p2m_flags_to_type(l1e_get_flags(*p2m_entry)));
old_mfn = l1e_get_pfn(*p2m_entry);
+ iommu_old_flags =
+ p2m_get_iommu_flags(p2m_flags_to_type(l1e_get_flags(*p2m_entry)),
+ _mfn(old_mfn));
if ( mfn_valid(mfn) || p2m_allows_invalid_mfn(p2mt) )
entry_content = p2m_l1e_from_pfn(mfn_x(mfn),
@@ -637,9 +639,10 @@ p2m_pt_set_entry(struct p2m_domain *p2m, unsigned long gfn, mfn_t mfn,
{
if ( flags & _PAGE_PSE )
{
- iommu_old_flags =
- p2m_get_iommu_flags(p2m_flags_to_type(flags));
old_mfn = l1e_get_pfn(*p2m_entry);
+ iommu_old_flags =
+ p2m_get_iommu_flags(p2m_flags_to_type(flags),
+ _mfn(old_mfn));
}
else
{
diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c
index 6a45185..7e33ab6 100644
--- a/xen/arch/x86/mm/p2m.c
+++ b/xen/arch/x86/mm/p2m.c
@@ -1053,16 +1053,7 @@ int set_identity_p2m_entry(struct domain *d, unsigned long gfn,
ret = p2m_set_entry(p2m, gfn, _mfn(gfn), PAGE_ORDER_4K,
p2m_mmio_direct, p2ma);
else if ( mfn_x(mfn) == gfn && p2mt == p2m_mmio_direct && a == p2ma )
- {
ret = 0;
- /*
- * PVH fixme: during Dom0 PVH construction, p2m entries are being set
- * but iomem regions are not mapped with IOMMU. This makes sure that
- * RMRRs are correctly mapped with IOMMU.
- */
- if ( is_hardware_domain(d) && !iommu_use_hap_pt(d) )
- ret = iommu_map_page(d, gfn, gfn, IOMMUF_readable|IOMMUF_writable);
- }
else
{
if ( flag & XEN_DOMCTL_DEV_RDM_RELAXED )
diff --git a/xen/include/asm-x86/p2m.h b/xen/include/asm-x86/p2m.h
index 7035860..271d379 100644
--- a/xen/include/asm-x86/p2m.h
+++ b/xen/include/asm-x86/p2m.h
@@ -824,7 +824,7 @@ void p2m_altp2m_propagate_change(struct domain *d, gfn_t gfn,
/*
* p2m type to IOMMU flags
*/
-static inline unsigned int p2m_get_iommu_flags(p2m_type_t p2mt)
+static inline unsigned int p2m_get_iommu_flags(p2m_type_t p2mt, mfn_t mfn)
{
unsigned int flags;
@@ -840,6 +840,10 @@ static inline unsigned int p2m_get_iommu_flags(p2m_type_t p2mt)
case p2m_grant_map_ro:
flags = IOMMUF_readable;
break;
+ case p2m_mmio_direct:
+ flags = IOMMUF_readable;
+ if ( rangeset_contains_singleton(mmio_ro_ranges, mfn_x(mfn)) )
+ flags |= IOMMUF_writable;
default:
flags = 0;
break;
--
2.10.1 (Apple Git-78)
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next prev parent reply other threads:[~2017-01-19 17:29 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-19 17:29 [PATCH v5 0/9] Initial PVHv2 Dom0 support Roger Pau Monne
2017-01-19 17:29 ` [PATCH v5 1/9] xen/x86: remove XENFEAT_hvm_pirqs for PVHv2 guests Roger Pau Monne
2017-01-20 18:41 ` Andrew Cooper
2017-01-23 12:28 ` Roger Pau Monne
2017-01-19 17:29 ` Roger Pau Monne [this message]
2017-01-20 6:41 ` [PATCH v5 2/9] x86/iommu: add IOMMU entries for p2m_mmio_direct pages Tian, Kevin
2017-01-20 10:28 ` Roger Pau Monne
2017-01-20 18:44 ` Andrew Cooper
2017-01-22 4:45 ` Tian, Kevin
2017-01-19 17:29 ` [PATCH v5 3/9] xen/x86: split Dom0 build into PV and PVHv2 Roger Pau Monne
2017-01-20 19:03 ` Andrew Cooper
2017-01-23 12:58 ` Roger Pau Monne
2017-01-23 12:59 ` Andrew Cooper
2017-01-20 19:13 ` Boris Ostrovsky
2017-01-20 19:27 ` Andrew Cooper
2017-01-26 11:43 ` Jan Beulich
2017-01-26 16:36 ` Roger Pau Monne
2017-01-19 17:29 ` [PATCH v5 4/9] xen/x86: populate PVHv2 Dom0 physical memory map Roger Pau Monne
2017-01-20 19:41 ` Andrew Cooper
2017-01-23 11:23 ` Jan Beulich
2017-01-23 14:11 ` Boris Ostrovsky
2017-01-23 14:43 ` Roger Pau Monne
2017-01-26 12:41 ` Jan Beulich
2017-01-27 11:14 ` Tim Deegan
2017-01-27 12:37 ` Roger Pau Monne
2017-01-27 12:51 ` Andrew Cooper
2017-01-27 13:20 ` Tim Deegan
2017-01-27 13:46 ` Andrew Cooper
2017-01-27 14:01 ` Tim Deegan
2017-01-27 14:35 ` Andrew Cooper
2017-01-27 19:43 ` Tim Deegan
2017-01-30 10:43 ` Jan Beulich
2017-01-30 11:06 ` Andrew Cooper
2017-01-27 16:40 ` Jan Beulich
2017-01-27 18:06 ` Andrew Cooper
2017-02-03 13:57 ` Jan Beulich
2017-01-27 19:48 ` Tim Deegan
2017-02-02 15:38 ` Jan Beulich
2017-01-27 12:23 ` Roger Pau Monne
2017-01-27 15:11 ` Jan Beulich
2017-01-27 16:04 ` Roger Pau Monne
2017-01-27 16:29 ` Jan Beulich
2017-01-19 17:29 ` [PATCH v5 5/9] x86/hvm: add vcpu parameter to guest memory copy function Roger Pau Monne
2017-01-20 19:45 ` Andrew Cooper
2017-01-23 13:50 ` Roger Pau Monne
2017-01-26 12:51 ` Jan Beulich
2017-01-26 13:33 ` Jan Beulich
2017-01-27 14:55 ` Roger Pau Monne
2017-01-19 17:29 ` [PATCH v5 6/9] xen/x86: parse Dom0 kernel for PVHv2 Roger Pau Monne
2017-01-26 13:37 ` Jan Beulich
2017-01-27 17:22 ` Roger Pau Monne
2017-01-27 17:28 ` Roger Pau Monne
2017-01-30 10:20 ` Jan Beulich
2017-01-27 18:03 ` Roger Pau Monne
2017-01-30 10:14 ` Jan Beulich
2017-01-19 17:29 ` [PATCH v5 7/9] x86/PVHv2: fix dom0_max_vcpus so it's capped to 128 for PVHv2 Dom0 Roger Pau Monne
2017-01-19 17:32 ` Andrew Cooper
2017-01-26 13:39 ` Jan Beulich
2017-01-19 17:29 ` [PATCH v5 8/9] xen/x86: Setup PVHv2 Dom0 CPUs Roger Pau Monne
2017-01-26 13:46 ` Jan Beulich
2017-02-08 12:48 ` Roger Pau Monne
2017-02-08 13:02 ` Jan Beulich
2017-01-19 17:29 ` [PATCH v5 9/9] xen/x86: setup PVHv2 Dom0 ACPI tables Roger Pau Monne
2017-01-26 14:16 ` Jan Beulich
2017-02-08 15:10 ` Roger Pau Monne
2017-02-08 15:50 ` Jan Beulich
2017-02-08 15:58 ` Roger Pau Monne
2017-02-08 16:03 ` Jan Beulich
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