Re: [PATCH RESEND v5 03/24] x86: refactor psr: implement main data structures.

[Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>]

On Tue, Jan 31, 2017 at 03:10:14AM -0700, Jan Beulich wrote:
> >>> On 30.01.17 at 23:20, <konrad.wilk@oracle.com> wrote:
> >> --- a/xen/arch/x86/psr.c
> >> +++ b/xen/arch/x86/psr.c
> >> @@ -17,12 +17,116 @@
> >>  #include <xen/cpu.h>
> >>  #include <xen/err.h>
> >>  #include <xen/sched.h>
> >> +#include <xen/list.h>
> >>  #include <asm/psr.h>
> >>  
> >> +/*
> >> + * Terminology:
> >> + * - CAT         Cache Allocation Technology
> >> + * - CBM         Capacity BitMasks
> >> + * - CDP         Code and Data Prioritization
> >> + * - COS/CLOS    Class of Service. Also mean COS registers.
> >> + * - COS_MAX     Max number of COS for the feature (minus 1)
> >> + * - MSRs        Machine Specific Registers
> >> + * - PSR         Intel Platform Shared Resource
> >> + */
> >> +
> >>  #define PSR_CMT        (1<<0)
> >>  #define PSR_CAT        (1<<1)
> >>  #define PSR_CDP        (1<<2)
> >>  
> >> +/*
> >> + * Per SDM chapter 'Cache Allocation Technology: Cache Mask Configuration',
> >> + * the MSRs range from 0C90H through 0D0FH (inclusive), enables support for
> > 
> > s/enables/enable/
> >> + * up to 128 L3 CAT Classes of Service. The COS_ID=[0,127].
> >> + *
> >> + * The MSRs range from 0D10H through 0D4FH (inclusive), enables support for
> > 
> > s/enables/enable/
> 
> For both of them - why? Both talk about a (single) range.

The 's' on the verb makes it singular. The MSRs is plural.

You don't do plural verb and plural subject - so the 's' has to be either
on the MSRs (and 'enable'), or you move the s from MSRs ('MSR' and 'enables').

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel