From: Haozhong Zhang <haozhong.zhang@intel.com>
To: xen-devel@lists.xen.org
Cc: Haozhong Zhang <haozhong.zhang@intel.com>,
Christoph Egger <chegger@amazon.de>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Jan Beulich <jbeulich@suse.com>,
Liu Jinsong <jinsong.liu@alibaba-inc.com>
Subject: [PATCH 07/19] x86/vmce: include domain/vcpu id in debug messages
Date: Fri, 17 Feb 2017 14:39:24 +0800 [thread overview]
Message-ID: <20170217063936.13208-8-haozhong.zhang@intel.com> (raw)
In-Reply-To: <20170217063936.13208-1-haozhong.zhang@intel.com>
Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
---
Cc: Christoph Egger <chegger@amazon.de>
Cc: Liu Jinsong <jinsong.liu@alibaba-inc.com>
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
---
xen/arch/x86/cpu/mcheck/vmce.c | 35 ++++++++++++++++++++---------------
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
index 5f002e3..d83a3f2 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -110,15 +110,16 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
case MSR_IA32_MC0_CTL:
/* stick all 1's to MCi_CTL */
*val = ~0UL;
- mce_printk(MCE_VERBOSE, "MCE: rd MC%u_CTL %#"PRIx64"\n", bank, *val);
+ mce_printk(MCE_VERBOSE, "MCE: %pv: rd MC%u_CTL %#"PRIx64"\n",
+ v, bank, *val);
break;
case MSR_IA32_MC0_STATUS:
if ( bank < GUEST_MC_BANK_NUM )
{
*val = v->arch.vmce.bank[bank].mci_status;
if ( *val )
- mce_printk(MCE_VERBOSE, "MCE: rd MC%u_STATUS %#"PRIx64"\n",
- bank, *val);
+ mce_printk(MCE_VERBOSE, "MCE: %pv: rd MC%u_STATUS %#"PRIx64"\n",
+ v, bank, *val);
}
break;
case MSR_IA32_MC0_ADDR:
@@ -126,8 +127,8 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
{
*val = v->arch.vmce.bank[bank].mci_addr;
if ( *val )
- mce_printk(MCE_VERBOSE, "MCE: rd MC%u_ADDR %#"PRIx64"\n",
- bank, *val);
+ mce_printk(MCE_VERBOSE, "MCE: %pv: rd MC%u_ADDR %#"PRIx64"\n",
+ v, bank, *val);
}
break;
case MSR_IA32_MC0_MISC:
@@ -135,8 +136,8 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
{
*val = v->arch.vmce.bank[bank].mci_misc;
if ( *val )
- mce_printk(MCE_VERBOSE, "MCE: rd MC%u_MISC %#"PRIx64"\n",
- bank, *val);
+ mce_printk(MCE_VERBOSE, "MCE: %pv: rd MC%u_MISC %#"PRIx64"\n",
+ v, bank, *val);
}
break;
default:
@@ -178,16 +179,16 @@ int vmce_rdmsr(uint32_t msr, uint64_t *val)
*val = cur->arch.vmce.mcg_status;
if (*val)
mce_printk(MCE_VERBOSE,
- "MCE: rd MCG_STATUS %#"PRIx64"\n", *val);
+ "MCE: %pv: rd MCG_STATUS %#"PRIx64"\n", cur, *val);
break;
case MSR_IA32_MCG_CAP:
*val = cur->arch.vmce.mcg_cap;
- mce_printk(MCE_VERBOSE, "MCE: rd MCG_CAP %#"PRIx64"\n", *val);
+ mce_printk(MCE_VERBOSE, "MCE: %pv: rd MCG_CAP %#"PRIx64"\n", cur, *val);
break;
case MSR_IA32_MCG_CTL:
if ( cur->arch.vmce.mcg_cap & MCG_CTL_P )
*val = ~0ULL;
- mce_printk(MCE_VERBOSE, "MCE: rd MCG_CTL %#"PRIx64"\n", *val);
+ mce_printk(MCE_VERBOSE, "MCE: %pv: rd MCG_CTL %#"PRIx64"\n", cur, *val);
break;
default:
ret = mce_bank_msr(cur, msr) ? bank_mce_rdmsr(cur, msr, val) : 0;
@@ -217,21 +218,24 @@ static int bank_mce_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
*/
break;
case MSR_IA32_MC0_STATUS:
- mce_printk(MCE_VERBOSE, "MCE: wr MC%u_STATUS %#"PRIx64"\n", bank, val);
+ mce_printk(MCE_VERBOSE, "MCE: %pv: wr MC%u_STATUS %#"PRIx64"\n",
+ v, bank, val);
if ( val )
ret = -1;
else if ( bank < GUEST_MC_BANK_NUM )
v->arch.vmce.bank[bank].mci_status = val;
break;
case MSR_IA32_MC0_ADDR:
- mce_printk(MCE_VERBOSE, "MCE: wr MC%u_ADDR %#"PRIx64"\n", bank, val);
+ mce_printk(MCE_VERBOSE, "MCE: %pv: wr MC%u_ADDR %#"PRIx64"\n",
+ v, bank, val);
if ( val )
ret = -1;
else if ( bank < GUEST_MC_BANK_NUM )
v->arch.vmce.bank[bank].mci_addr = val;
break;
case MSR_IA32_MC0_MISC:
- mce_printk(MCE_VERBOSE, "MCE: wr MC%u_MISC %#"PRIx64"\n", bank, val);
+ mce_printk(MCE_VERBOSE, "MCE: %pv: wr MC%u_MISC %#"PRIx64"\n",
+ v, bank, val);
if ( val )
ret = -1;
else if ( bank < GUEST_MC_BANK_NUM )
@@ -275,7 +279,8 @@ int vmce_wrmsr(uint32_t msr, uint64_t val)
break;
case MSR_IA32_MCG_STATUS:
cur->arch.vmce.mcg_status = val;
- mce_printk(MCE_VERBOSE, "MCE: wr MCG_STATUS %"PRIx64"\n", val);
+ mce_printk(MCE_VERBOSE, "MCE: %pv: wr MCG_STATUS %"PRIx64"\n",
+ cur, val);
break;
case MSR_IA32_MCG_CAP:
/*
@@ -283,7 +288,7 @@ int vmce_wrmsr(uint32_t msr, uint64_t val)
* the effect of writing to the IA32_MCG_CAP is undefined. Here we
* treat writing as 'write not change'. Guest would not surprise.
*/
- mce_printk(MCE_VERBOSE, "MCE: MCG_CAP is r/o\n");
+ mce_printk(MCE_VERBOSE, "MCE: %pv: MCG_CAP is r/o\n", cur);
break;
default:
ret = mce_bank_msr(cur, msr) ? bank_mce_wrmsr(cur, msr, val) : 0;
--
2.10.1
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next prev parent reply other threads:[~2017-02-17 6:39 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-17 6:39 [PATCH 00/19] MCE code cleanup and add LMCE support Haozhong Zhang
2017-02-17 6:39 ` [PATCH 01/19] x86/mce: fix indentation style in xen-mca.h and mce.h Haozhong Zhang
2017-02-17 9:49 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 02/19] x86/mce: remove declarations of non-existing functions in mce.h Haozhong Zhang
2017-02-17 9:50 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 03/19] x86/mce: remove unnecessary braces around intel_get_extended_msrs() Haozhong Zhang
2017-02-17 9:51 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 04/19] xen/mce: remove unused x86_mcinfo_add() Haozhong Zhang
2017-02-17 9:55 ` Jan Beulich
2017-02-20 1:52 ` Haozhong Zhang
2017-02-20 9:00 ` Jan Beulich
2017-02-20 9:10 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 05/19] x86/mce: merge loops to get Intel extended MC MSR Haozhong Zhang
2017-02-17 9:58 ` Jan Beulich
2017-02-20 1:11 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 06/19] x86/mce: merge intel_default_mce_dhandler/uhandler() Haozhong Zhang
2017-02-17 10:01 ` Jan Beulich
2017-02-20 2:40 ` Haozhong Zhang
2017-02-17 6:39 ` Haozhong Zhang [this message]
2017-02-17 10:03 ` [PATCH 07/19] x86/vmce: include domain/vcpu id in debug messages Jan Beulich
2017-02-17 6:39 ` [PATCH 08/19] x86/mce: set mcinfo_comm.type and .size in x86_mcinfo_reserve() Haozhong Zhang
2017-02-17 10:07 ` Jan Beulich
2017-02-20 2:48 ` Haozhong Zhang
2017-02-20 9:02 ` Jan Beulich
2017-02-20 9:11 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 09/19] x86/vmce: fill MSR_IA32_MCG_STATUS on all vcpus in broadcast case Haozhong Zhang
2017-02-17 10:21 ` Jan Beulich
2017-02-20 4:36 ` Haozhong Zhang
2017-02-20 9:04 ` Jan Beulich
2017-02-20 9:12 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 10/19] x86/mce: always write 0 to MSR_IA32_MCG_STATUS on Intel CPU Haozhong Zhang
2017-02-17 10:26 ` Jan Beulich
2017-02-17 15:01 ` Boris Ostrovsky
2017-02-17 15:13 ` Jan Beulich
2017-02-17 15:38 ` Boris Ostrovsky
2017-02-17 6:39 ` [PATCH 11/19] tools/xen-mceinj: fix the type of cpu number Haozhong Zhang
2017-02-17 10:08 ` Jan Beulich
2017-02-20 2:49 ` Haozhong Zhang
2017-02-20 12:29 ` Wei Liu
2017-02-17 6:39 ` [PATCH 12/19] x86/mce: handle LMCE locally Haozhong Zhang
2017-02-22 13:53 ` Jan Beulich
2017-02-23 3:06 ` Haozhong Zhang
2017-02-23 7:42 ` Jan Beulich
2017-02-23 8:38 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 13/19] x86/mce_intel: detect and enable LMCE on Intel host Haozhong Zhang
2017-02-22 15:10 ` Jan Beulich
2017-02-23 3:16 ` Haozhong Zhang
2017-02-23 7:45 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 14/19] x86/vmx: expose LMCE feature via guest MSR_IA32_FEATURE_CONTROL Haozhong Zhang
2017-02-22 15:20 ` Jan Beulich
2017-02-23 4:10 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 15/19] x86/vmce: emulate MSR_IA32_MCG_EXT_CTL Haozhong Zhang
2017-02-22 15:36 ` Jan Beulich
2017-02-23 4:26 ` Haozhong Zhang
2017-02-23 7:53 ` Jan Beulich
2017-02-23 8:54 ` Haozhong Zhang
2017-02-23 9:04 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 16/19] x86/vmce: enable injecting LMCE to guest on Intel host Haozhong Zhang
2017-02-22 15:48 ` Jan Beulich
2017-02-23 4:48 ` Haozhong Zhang
2017-02-23 8:21 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 17/19] x86/vmce, tools/libxl: expose LMCE capability in guest MSR_IA32_MCG_CAP Haozhong Zhang
2017-02-20 12:32 ` Wei Liu
2017-02-20 12:38 ` Jan Beulich
2017-02-20 14:12 ` Wei Liu
2017-02-20 23:55 ` Haozhong Zhang
2017-02-22 15:55 ` Jan Beulich
2017-02-23 5:07 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 18/19] xen/mce: add support of vLMCE injection to XEN_MC_inject_v2 Haozhong Zhang
2017-02-22 15:59 ` Jan Beulich
2017-02-23 5:14 ` Haozhong Zhang
2017-02-23 8:26 ` Jan Beulich
2017-02-23 9:14 ` Haozhong Zhang
2017-02-23 9:22 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 19/19] tools/xen-mceinj: support injecting LMCE Haozhong Zhang
2017-02-20 12:53 ` Wei Liu
2017-02-20 23:50 ` Haozhong Zhang
2017-02-21 9:18 ` Wei Liu
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