From: Haozhong Zhang <haozhong.zhang@intel.com>
To: xen-devel@lists.xen.org
Cc: Haozhong Zhang <haozhong.zhang@intel.com>,
Christoph Egger <chegger@amazon.de>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Jan Beulich <jbeulich@suse.com>,
Liu Jinsong <jinsong.liu@alibaba-inc.com>
Subject: [PATCH 08/19] x86/mce: set mcinfo_comm.type and .size in x86_mcinfo_reserve()
Date: Fri, 17 Feb 2017 14:39:25 +0800 [thread overview]
Message-ID: <20170217063936.13208-9-haozhong.zhang@intel.com> (raw)
In-Reply-To: <20170217063936.13208-1-haozhong.zhang@intel.com>
All existing calls to x86_mcinfo_reserve() are followed by statements
that set the size and the type of the reserved space, so move them into
x86_mcinfo_reserve() to simplify the code.
Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
---
Cc: Christoph Egger <chegger@amazon.de>
Cc: Liu Jinsong <jinsong.liu@alibaba-inc.com>
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
---
xen/arch/x86/cpu/mcheck/mcaction.c | 4 +---
xen/arch/x86/cpu/mcheck/mce.c | 16 ++++++++--------
xen/arch/x86/cpu/mcheck/mce.h | 2 +-
xen/arch/x86/cpu/mcheck/mce_amd.c | 4 +---
xen/arch/x86/cpu/mcheck/mce_intel.c | 6 +-----
5 files changed, 12 insertions(+), 20 deletions(-)
diff --git a/xen/arch/x86/cpu/mcheck/mcaction.c b/xen/arch/x86/cpu/mcheck/mcaction.c
index 9cf2499..cc90e7c 100644
--- a/xen/arch/x86/cpu/mcheck/mcaction.c
+++ b/xen/arch/x86/cpu/mcheck/mcaction.c
@@ -13,14 +13,12 @@ mci_action_add_pageoffline(int bank, struct mc_info *mi,
if (!mi)
return NULL;
- rec = x86_mcinfo_reserve(mi, sizeof(*rec));
+ rec = x86_mcinfo_reserve(mi, sizeof(*rec), MC_TYPE_RECOVERY);
if (!rec) {
mi->flags |= MCINFO_FLAGS_UNCOMPLETE;
return NULL;
}
- rec->common.type = MC_TYPE_RECOVERY;
- rec->common.size = sizeof(*rec);
rec->mc_bank = bank;
rec->action_types = MC_ACTION_PAGE_OFFLINE;
rec->action_info.page_retire.mfn = mfn;
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index f682520..28bf579 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -204,7 +204,7 @@ static void mca_init_bank(enum mca_source who,
if (!mi)
return;
- mib = x86_mcinfo_reserve(mi, sizeof(*mib));
+ mib = x86_mcinfo_reserve(mi, sizeof(*mib), MC_TYPE_BANK);
if (!mib)
{
mi->flags |= MCINFO_FLAGS_UNCOMPLETE;
@@ -213,8 +213,6 @@ static void mca_init_bank(enum mca_source who,
mib->mc_status = mca_rdmsr(MSR_IA32_MCx_STATUS(bank));
- mib->common.type = MC_TYPE_BANK;
- mib->common.size = sizeof (struct mcinfo_bank);
mib->mc_bank = bank;
if (mib->mc_status & MCi_STATUS_MISCV)
@@ -250,8 +248,6 @@ static int mca_init_global(uint32_t flags, struct mcinfo_global *mig)
struct domain *d;
/* Set global information */
- mig->common.type = MC_TYPE_GLOBAL;
- mig->common.size = sizeof (struct mcinfo_global);
status = mca_rdmsr(MSR_IA32_MCG_STATUS);
mig->mc_gstatus = status;
mig->mc_domid = mig->mc_vcpuid = -1;
@@ -351,7 +347,7 @@ mcheck_mca_logout(enum mca_source who, struct mca_banks *bankmask,
if ( (mctc = mctelem_reserve(which)) != NULL ) {
mci = mctelem_dataptr(mctc);
mcinfo_clear(mci);
- mig = x86_mcinfo_reserve(mci, sizeof(*mig));
+ mig = x86_mcinfo_reserve(mci, sizeof(*mig), MC_TYPE_GLOBAL);
/* mc_info should at least hold up the global information */
ASSERT(mig);
mca_init_global(mc_flags, mig);
@@ -804,7 +800,7 @@ static void mcinfo_clear(struct mc_info *mi)
x86_mcinfo_nentries(mi) = 0;
}
-void *x86_mcinfo_reserve(struct mc_info *mi, int size)
+void *x86_mcinfo_reserve(struct mc_info *mi, uint16_t size, uint16_t type)
{
int i;
unsigned long end1, end2;
@@ -831,7 +827,11 @@ void *x86_mcinfo_reserve(struct mc_info *mi, int size)
/* there's enough space. add entry. */
x86_mcinfo_nentries(mi)++;
- return memset(mic_index, 0, size);
+ memset(mic_index, 0, size);
+ mic_index->size = size;
+ mic_index->type = type;
+
+ return mic_index;
}
static void x86_mcinfo_apei_save(
diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
index 56877c1..2f4e7a4 100644
--- a/xen/arch/x86/cpu/mcheck/mce.h
+++ b/xen/arch/x86/cpu/mcheck/mce.h
@@ -146,7 +146,7 @@ typedef struct mcinfo_extended *(*x86_mce_callback_t)
(struct mc_info *, uint16_t, uint64_t);
extern void x86_mce_callback_register(x86_mce_callback_t);
-void *x86_mcinfo_reserve(struct mc_info *mi, int size);
+void *x86_mcinfo_reserve(struct mc_info *mi, uint16_t size, uint16_t type);
void x86_mcinfo_dump(struct mc_info *mi);
static inline int mce_vendor_bank_msr(const struct vcpu *v, uint32_t msr)
diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c
index 599e465..fe51be9 100644
--- a/xen/arch/x86/cpu/mcheck/mce_amd.c
+++ b/xen/arch/x86/cpu/mcheck/mce_amd.c
@@ -218,15 +218,13 @@ amd_f10_handler(struct mc_info *mi, uint16_t bank, uint64_t status)
if ( !(status & MCi_STATUS_MISCV) )
return NULL;
- mc_ext = x86_mcinfo_reserve(mi, sizeof(*mc_ext));
+ mc_ext = x86_mcinfo_reserve(mi, sizeof(*mc_ext), MC_TYPE_EXTENDED);
if ( !mc_ext )
{
mi->flags |= MCINFO_FLAGS_UNCOMPLETE;
return NULL;
}
- mc_ext->common.type = MC_TYPE_EXTENDED;
- mc_ext->common.size = sizeof(*mc_ext);
mc_ext->mc_msrs = 3;
mc_ext->mc_msr[0].reg = MSR_F10_MC4_MISC1;
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
index b5ee8b8..9e5ee3d 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -200,17 +200,13 @@ intel_get_extended_msrs(struct mcinfo_global *mig, struct mc_info *mi)
!(mig->mc_gstatus & MCG_STATUS_EIPV))
return NULL;
- mc_ext = x86_mcinfo_reserve(mi, sizeof(*mc_ext));
+ mc_ext = x86_mcinfo_reserve(mi, sizeof(*mc_ext), MC_TYPE_EXTENDED);
if (!mc_ext)
{
mi->flags |= MCINFO_FLAGS_UNCOMPLETE;
return NULL;
}
- /* this function will called when CAP(9).MCG_EXT_P = 1 */
- mc_ext->common.type = MC_TYPE_EXTENDED;
- mc_ext->common.size = sizeof(struct mcinfo_extended);
-
for (i = MSR_IA32_MCG_EAX; i <= MSR_IA32_MCG_R15; i++)
intel_get_extended_msr(mc_ext, i);
--
2.10.1
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next prev parent reply other threads:[~2017-02-17 6:39 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-17 6:39 [PATCH 00/19] MCE code cleanup and add LMCE support Haozhong Zhang
2017-02-17 6:39 ` [PATCH 01/19] x86/mce: fix indentation style in xen-mca.h and mce.h Haozhong Zhang
2017-02-17 9:49 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 02/19] x86/mce: remove declarations of non-existing functions in mce.h Haozhong Zhang
2017-02-17 9:50 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 03/19] x86/mce: remove unnecessary braces around intel_get_extended_msrs() Haozhong Zhang
2017-02-17 9:51 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 04/19] xen/mce: remove unused x86_mcinfo_add() Haozhong Zhang
2017-02-17 9:55 ` Jan Beulich
2017-02-20 1:52 ` Haozhong Zhang
2017-02-20 9:00 ` Jan Beulich
2017-02-20 9:10 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 05/19] x86/mce: merge loops to get Intel extended MC MSR Haozhong Zhang
2017-02-17 9:58 ` Jan Beulich
2017-02-20 1:11 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 06/19] x86/mce: merge intel_default_mce_dhandler/uhandler() Haozhong Zhang
2017-02-17 10:01 ` Jan Beulich
2017-02-20 2:40 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 07/19] x86/vmce: include domain/vcpu id in debug messages Haozhong Zhang
2017-02-17 10:03 ` Jan Beulich
2017-02-17 6:39 ` Haozhong Zhang [this message]
2017-02-17 10:07 ` [PATCH 08/19] x86/mce: set mcinfo_comm.type and .size in x86_mcinfo_reserve() Jan Beulich
2017-02-20 2:48 ` Haozhong Zhang
2017-02-20 9:02 ` Jan Beulich
2017-02-20 9:11 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 09/19] x86/vmce: fill MSR_IA32_MCG_STATUS on all vcpus in broadcast case Haozhong Zhang
2017-02-17 10:21 ` Jan Beulich
2017-02-20 4:36 ` Haozhong Zhang
2017-02-20 9:04 ` Jan Beulich
2017-02-20 9:12 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 10/19] x86/mce: always write 0 to MSR_IA32_MCG_STATUS on Intel CPU Haozhong Zhang
2017-02-17 10:26 ` Jan Beulich
2017-02-17 15:01 ` Boris Ostrovsky
2017-02-17 15:13 ` Jan Beulich
2017-02-17 15:38 ` Boris Ostrovsky
2017-02-17 6:39 ` [PATCH 11/19] tools/xen-mceinj: fix the type of cpu number Haozhong Zhang
2017-02-17 10:08 ` Jan Beulich
2017-02-20 2:49 ` Haozhong Zhang
2017-02-20 12:29 ` Wei Liu
2017-02-17 6:39 ` [PATCH 12/19] x86/mce: handle LMCE locally Haozhong Zhang
2017-02-22 13:53 ` Jan Beulich
2017-02-23 3:06 ` Haozhong Zhang
2017-02-23 7:42 ` Jan Beulich
2017-02-23 8:38 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 13/19] x86/mce_intel: detect and enable LMCE on Intel host Haozhong Zhang
2017-02-22 15:10 ` Jan Beulich
2017-02-23 3:16 ` Haozhong Zhang
2017-02-23 7:45 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 14/19] x86/vmx: expose LMCE feature via guest MSR_IA32_FEATURE_CONTROL Haozhong Zhang
2017-02-22 15:20 ` Jan Beulich
2017-02-23 4:10 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 15/19] x86/vmce: emulate MSR_IA32_MCG_EXT_CTL Haozhong Zhang
2017-02-22 15:36 ` Jan Beulich
2017-02-23 4:26 ` Haozhong Zhang
2017-02-23 7:53 ` Jan Beulich
2017-02-23 8:54 ` Haozhong Zhang
2017-02-23 9:04 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 16/19] x86/vmce: enable injecting LMCE to guest on Intel host Haozhong Zhang
2017-02-22 15:48 ` Jan Beulich
2017-02-23 4:48 ` Haozhong Zhang
2017-02-23 8:21 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 17/19] x86/vmce, tools/libxl: expose LMCE capability in guest MSR_IA32_MCG_CAP Haozhong Zhang
2017-02-20 12:32 ` Wei Liu
2017-02-20 12:38 ` Jan Beulich
2017-02-20 14:12 ` Wei Liu
2017-02-20 23:55 ` Haozhong Zhang
2017-02-22 15:55 ` Jan Beulich
2017-02-23 5:07 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 18/19] xen/mce: add support of vLMCE injection to XEN_MC_inject_v2 Haozhong Zhang
2017-02-22 15:59 ` Jan Beulich
2017-02-23 5:14 ` Haozhong Zhang
2017-02-23 8:26 ` Jan Beulich
2017-02-23 9:14 ` Haozhong Zhang
2017-02-23 9:22 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 19/19] tools/xen-mceinj: support injecting LMCE Haozhong Zhang
2017-02-20 12:53 ` Wei Liu
2017-02-20 23:50 ` Haozhong Zhang
2017-02-21 9:18 ` Wei Liu
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