From: Haozhong Zhang <haozhong.zhang@intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
Christoph Egger <chegger@amazon.de>,
xen-devel@lists.xen.org
Subject: Re: [PATCH 05/19] x86/mce: merge loops to get Intel extended MC MSR
Date: Mon, 20 Feb 2017 09:11:08 +0800 [thread overview]
Message-ID: <20170220011108.cxywz6qngpgpacwt@hz-desktop> (raw)
In-Reply-To: <58A6D747020000780013B2A0@prv-mh.provo.novell.com>
On 02/17/17 02:58 -0700, Jan Beulich wrote:
>>>> On 17.02.17 at 07:39, <haozhong.zhang@intel.com> wrote:
>> The second loop that gets MSR_IA32_MCG_R8 to MSR_IA32_MCG_R15 was
>> surrounded by '#ifdef __X86_64__ ... #endif' and had to be seperated
>> from the first loop that gets MSR_IA32_MCG_EAX to MSR_IA32_MCG_MISC.
>> Because Xen had dropped support for 32-bit x86 host, these two loops
>> can be merged now.
>
>No, they can't - the number spaces aren't contiguous.
>
Sorry, my mistake. I'll drop this one.
Thanks,
Haozhong
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
next prev parent reply other threads:[~2017-02-20 1:11 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-17 6:39 [PATCH 00/19] MCE code cleanup and add LMCE support Haozhong Zhang
2017-02-17 6:39 ` [PATCH 01/19] x86/mce: fix indentation style in xen-mca.h and mce.h Haozhong Zhang
2017-02-17 9:49 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 02/19] x86/mce: remove declarations of non-existing functions in mce.h Haozhong Zhang
2017-02-17 9:50 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 03/19] x86/mce: remove unnecessary braces around intel_get_extended_msrs() Haozhong Zhang
2017-02-17 9:51 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 04/19] xen/mce: remove unused x86_mcinfo_add() Haozhong Zhang
2017-02-17 9:55 ` Jan Beulich
2017-02-20 1:52 ` Haozhong Zhang
2017-02-20 9:00 ` Jan Beulich
2017-02-20 9:10 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 05/19] x86/mce: merge loops to get Intel extended MC MSR Haozhong Zhang
2017-02-17 9:58 ` Jan Beulich
2017-02-20 1:11 ` Haozhong Zhang [this message]
2017-02-17 6:39 ` [PATCH 06/19] x86/mce: merge intel_default_mce_dhandler/uhandler() Haozhong Zhang
2017-02-17 10:01 ` Jan Beulich
2017-02-20 2:40 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 07/19] x86/vmce: include domain/vcpu id in debug messages Haozhong Zhang
2017-02-17 10:03 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 08/19] x86/mce: set mcinfo_comm.type and .size in x86_mcinfo_reserve() Haozhong Zhang
2017-02-17 10:07 ` Jan Beulich
2017-02-20 2:48 ` Haozhong Zhang
2017-02-20 9:02 ` Jan Beulich
2017-02-20 9:11 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 09/19] x86/vmce: fill MSR_IA32_MCG_STATUS on all vcpus in broadcast case Haozhong Zhang
2017-02-17 10:21 ` Jan Beulich
2017-02-20 4:36 ` Haozhong Zhang
2017-02-20 9:04 ` Jan Beulich
2017-02-20 9:12 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 10/19] x86/mce: always write 0 to MSR_IA32_MCG_STATUS on Intel CPU Haozhong Zhang
2017-02-17 10:26 ` Jan Beulich
2017-02-17 15:01 ` Boris Ostrovsky
2017-02-17 15:13 ` Jan Beulich
2017-02-17 15:38 ` Boris Ostrovsky
2017-02-17 6:39 ` [PATCH 11/19] tools/xen-mceinj: fix the type of cpu number Haozhong Zhang
2017-02-17 10:08 ` Jan Beulich
2017-02-20 2:49 ` Haozhong Zhang
2017-02-20 12:29 ` Wei Liu
2017-02-17 6:39 ` [PATCH 12/19] x86/mce: handle LMCE locally Haozhong Zhang
2017-02-22 13:53 ` Jan Beulich
2017-02-23 3:06 ` Haozhong Zhang
2017-02-23 7:42 ` Jan Beulich
2017-02-23 8:38 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 13/19] x86/mce_intel: detect and enable LMCE on Intel host Haozhong Zhang
2017-02-22 15:10 ` Jan Beulich
2017-02-23 3:16 ` Haozhong Zhang
2017-02-23 7:45 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 14/19] x86/vmx: expose LMCE feature via guest MSR_IA32_FEATURE_CONTROL Haozhong Zhang
2017-02-22 15:20 ` Jan Beulich
2017-02-23 4:10 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 15/19] x86/vmce: emulate MSR_IA32_MCG_EXT_CTL Haozhong Zhang
2017-02-22 15:36 ` Jan Beulich
2017-02-23 4:26 ` Haozhong Zhang
2017-02-23 7:53 ` Jan Beulich
2017-02-23 8:54 ` Haozhong Zhang
2017-02-23 9:04 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 16/19] x86/vmce: enable injecting LMCE to guest on Intel host Haozhong Zhang
2017-02-22 15:48 ` Jan Beulich
2017-02-23 4:48 ` Haozhong Zhang
2017-02-23 8:21 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 17/19] x86/vmce, tools/libxl: expose LMCE capability in guest MSR_IA32_MCG_CAP Haozhong Zhang
2017-02-20 12:32 ` Wei Liu
2017-02-20 12:38 ` Jan Beulich
2017-02-20 14:12 ` Wei Liu
2017-02-20 23:55 ` Haozhong Zhang
2017-02-22 15:55 ` Jan Beulich
2017-02-23 5:07 ` Haozhong Zhang
2017-02-17 6:39 ` [PATCH 18/19] xen/mce: add support of vLMCE injection to XEN_MC_inject_v2 Haozhong Zhang
2017-02-22 15:59 ` Jan Beulich
2017-02-23 5:14 ` Haozhong Zhang
2017-02-23 8:26 ` Jan Beulich
2017-02-23 9:14 ` Haozhong Zhang
2017-02-23 9:22 ` Jan Beulich
2017-02-17 6:39 ` [PATCH 19/19] tools/xen-mceinj: support injecting LMCE Haozhong Zhang
2017-02-20 12:53 ` Wei Liu
2017-02-20 23:50 ` Haozhong Zhang
2017-02-21 9:18 ` Wei Liu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170220011108.cxywz6qngpgpacwt@hz-desktop \
--to=haozhong.zhang@intel.com \
--cc=JBeulich@suse.com \
--cc=andrew.cooper3@citrix.com \
--cc=chegger@amazon.de \
--cc=xen-devel@lists.xen.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).