From: Chao Gao <chao.gao@intel.com>
To: "Xuquan (Quan Xu)" <xuquan8@huawei.com>
Cc: "yang.zhang.wz@gmail.com" <yang.zhang.wz@gmail.com>,
Kevin Tian <kevin.tian@intel.com>,
"quan.xu0@gmail.com" <quan.xu0@gmail.com>,
Jan Beulich <JBeulich@suse.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
Jun Nakajima <jun.nakajima@intel.com>
Subject: Re: [PATCH] x86/apicv: enhance posted-interrupt processing
Date: Mon, 20 Feb 2017 16:24:25 +0800 [thread overview]
Message-ID: <20170220082425.GA33407@skl-2s3.sh.intel.com> (raw)
In-Reply-To: <E0A769A898ADB6449596C41F51EF62C6AE7393@SZXEMI506-MBX.china.huawei.com>
On Mon, Feb 20, 2017 at 11:25:29AM +0000, Xuquan (Quan Xu) wrote:
>On February 18, 2017 12:33 AM, Jan Beulich wrote:
>>>>> On 17.02.17 at 09:49, <chao.gao@intel.com> wrote:
>>> On Fri, Feb 17, 2017 at 09:37:45AM +0000, Xuquan (Quan Xu) wrote:
>>>>From a589074281cc22a30ed75a5bccba60e83d2312a6 Mon Sep 17
>>00:00:00 2001
>>>>From: Quan Xu <xuquan8@huawei.com>
>>>>Date: Sat, 18 Feb 2017 09:27:37 +0800
>>>>Subject: [PATCH] x86/apicv: enhance posted-interrupt processing
>>>>
>>>>If guest is already in non-root mode, an posted interrupt will be
>>>>directly delivered to guest (leaving softirq being set w/o actually
>>>>incurring a VM-Exit - breaking desired softirq behavior).
>>>>Then further posted interrupts will skip the IPI, stay in PIR and not
>>>>noted until another VM-Exit happens.
>>>>
>>>>Remove the softirq set. Actually since it's an optimization for less
>>>>IPIs, check softirq_pending(cpu) directly instead of sticking to one
>>>>bit only.
>>>>
>>>>Signed-off-by: Quan Xu <xuquan8@huawei.com>
>>>>---
>>>> xen/arch/x86/hvm/vmx/vmx.c | 3 +--
>>>> 1 file changed, 1 insertion(+), 2 deletions(-)
>>>>
>>>>diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
>>>>index 61925cf..3887c32 100644
>>>>--- a/xen/arch/x86/hvm/vmx/vmx.c
>>>>+++ b/xen/arch/x86/hvm/vmx/vmx.c
>>>>@@ -1846,8 +1846,7 @@ static void
>>__vmx_deliver_posted_interrupt(struct vcpu *v)
>>>> {
>>>> unsigned int cpu = v->processor;
>>>>
>>>>- if ( !test_and_set_bit(VCPU_KICK_SOFTIRQ,
>>&softirq_pending(cpu))
>>>>- && (cpu != smp_processor_id()) )
>>>>+ if ( !softirq_pending(cpu) && (cpu != smp_processor_id()) )
>>> HI, Quan.
>>> Is there a situation that we need set VCPU_KICK_SOFTIRQ. For example,
>>> after vmx_intr_assist(), a interrupt happened and its handler called
>>> this function to deliver interrupt to current vcpu. In that case, the
>>> interrupt would not be injected to guest before this VM-entry for we
>>> don't generate a softirq and don't send a self-IPI to current vcpu.
>>
>
>Chao, __iiuc__, your question may be from the comments of xen/arch/x86/hvm/vmx/vmx.c :: pi_notification_interrupt() ..
>IF VT-d PI is enabled,
> VCPU_KICK_SOFTIRQ bit is set by ' raise_softirq(VCPU_KICK_SOFTIRQ)', at the end of pi_notification_interrupt()..
>Else
> Is it possible for your case?
>
If vcpu is in root mode and is to do VM-entry, it has synced PIR to vIRR.
Now a interrupt (e.g. PMU_APIC_VECTOR) happens. Thus it goes following the path
pmu_apic_interrupt->vpmu_do_interrupt->vlapic_set_irq(assume it will inject a interrupt to current vcpu)
-> vmx_deliver_posted_intr( set one bit in PIR )-> __vmx_deliver_posted_interrupt
Assuming that there is no softirq pending, the code after change doesn't generate a IPI
for (cpu == smp_processor_id()). In this case, this interrupt would not be
injected to guest before this VM-entry.
Although there are many assumption in the explaination, I think it may be possible.
Thanks,
Chao
>I hope Kevin could help us to check/correct it.
>
>
>>Good point, I think we indeed want to retain the old behavior (but in a not
>>open coded fashion) for the cpu == smp_processor_id() case.
>>
>__iiuc__
>for the cpu == smp_processor_id() case, the vCPUs (cpu = v->processor) pending to this cpu, are indeed not in guest-mode..
>
>Quan
>
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next prev parent reply other threads:[~2017-02-20 8:24 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-17 9:37 [PATCH] x86/apicv: enhance posted-interrupt processing Xuquan (Quan Xu)
2017-02-17 8:49 ` Chao Gao
2017-02-17 16:32 ` Jan Beulich
2017-02-20 11:25 ` Xuquan (Quan Xu)
2017-02-20 8:24 ` Chao Gao [this message]
2017-02-21 2:49 ` Xuquan (Quan Xu)
2017-02-21 3:07 ` Tian, Kevin
2017-02-21 4:11 ` Xuquan (Quan Xu)
2017-02-20 21:54 ` Chao Gao
2017-02-21 6:19 ` Xuquan (Quan Xu)
2017-02-21 9:08 ` Jan Beulich
2017-02-21 9:44 ` Tian, Kevin
2017-02-23 9:28 ` Xuquan (Quan Xu)
2017-02-23 9:59 ` Jan Beulich
2017-02-23 10:53 ` Xuquan (Quan Xu)
2017-02-23 11:01 ` Jan Beulich
2017-02-23 11:55 ` Xuquan (Quan Xu)
2017-02-23 8:37 ` Chao Gao
2017-02-27 8:00 ` Xuquan (Quan Xu)
2017-02-23 12:26 ` Jan Beulich
2017-02-24 8:02 ` Xuquan (Quan Xu)
2017-02-24 8:20 ` Jan Beulich
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