From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chao Gao <chao.gao@intel.com>
Subject: Re: [PATCH] x86/apicv: enhance posted-interrupt
	processing
Date: Thu, 23 Feb 2017 16:37:38 +0800
Message-ID: <20170223083738.GA19766@skl-2s3.sh.intel.com>
References: <E0A769A898ADB6449596C41F51EF62C6AE6E44@SZXEMI506-MBX.china.huawei.com>
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 <E0A769A898ADB6449596C41F51EF62C6AE80AB@SZXEMI506-MBX.china.huawei.com>
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 <E0A769A898ADB6449596C41F51EF62C6AE81E4@SZXEMI506-MBX.china.huawei.com>
 <58AECF09020000780013D29A@prv-mh.provo.novell.com>
 <E0A769A898ADB6449596C41F51EF62C6AE8236@SZXEMI506-MBX.china.huawei.com>
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To: "Xuquan (Quan Xu)" <xuquan8@huawei.com>
Cc: "yang.zhang.wz@gmail.com" <yang.zhang.wz@gmail.com>, KevinTian <kevin.tian@intel.com>, "quan.xu0@gmail.com" <quan.xu0@gmail.com>, Jan Beulich <JBeulich@suse.com>, Andrew Cooper <andrew.cooper3@citrix.com>, "xen-devel@lists.xen.org" <xen-devel@lists.xen.org>, Jun Nakajima <jun.nakajima@intel.com>
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