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From: Haozhong Zhang <haozhong.zhang@intel.com>
To: xen-devel@lists.xen.org
Cc: Haozhong Zhang <haozhong.zhang@intel.com>,
	Christoph Egger <chegger@amazon.de>,
	Jan Beulich <jbeulich@suse.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>
Subject: [PATCH 6/7] xen/mce: make ASSERT's about mce_dhandler_num in mce_action() Intel only
Date: Fri, 24 Feb 2017 18:52:55 +0800	[thread overview]
Message-ID: <20170224105256.24668-7-haozhong.zhang@intel.com> (raw)
In-Reply-To: <20170224105256.24668-1-haozhong.zhang@intel.com>

mce_dhandlers[] and its array size mce_dhandler_num are not used and
set on non-Intel platforms, so the corresponding ASSERT's in
mce_action() should be valid only for Intel.

Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
---
Cc: Christoph Egger <chegger@amazon.de>
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
---
 xen/arch/x86/cpu/mcheck/mce.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index 5a7e2ba..81d0902 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -1621,8 +1621,8 @@ static enum mce_result mce_action(const struct cpu_user_regs *regs,
         handlers = mce_uhandlers;
     }
 
-    /* At least a default handler should be registerd */
-    ASSERT(handler_num);
+    /* At least a default handler should be registered for Intel CPU. */
+    ASSERT(handler_num || boot_cpu_data.x86_vendor != X86_VENDOR_INTEL);
 
     local_mi = (struct mc_info*)mctelem_dataptr(mctc);
     x86_mcinfo_lookup(mic, local_mi, MC_TYPE_GLOBAL);
@@ -1656,7 +1656,8 @@ static enum mce_result mce_action(const struct cpu_user_regs *regs,
                 break;
             }
         }
-        ASSERT(i != handler_num);
+        ASSERT(i != handler_num ||
+               boot_cpu_data.x86_vendor != X86_VENDOR_INTEL);
     }
 
     return worst_result;
-- 
2.10.1


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  parent reply	other threads:[~2017-02-24 10:52 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-24 10:52 [PATCH 0/7] MCE code cleanup and bugfix Haozhong Zhang
2017-02-24 10:52 ` [PATCH 1/7] xen/mce: adjust comment of callback register functions Haozhong Zhang
2017-02-24 10:52 ` [PATCH 2/7] xen/mce: remove unused x86_mcinfo_add() Haozhong Zhang
2017-02-24 15:01   ` Jan Beulich
2017-02-24 10:52 ` [PATCH 3/7] x86/mce: set mcinfo_comm.type and .size in x86_mcinfo_reserve() Haozhong Zhang
2017-02-24 15:02   ` Jan Beulich
2017-02-24 10:52 ` [PATCH 4/7] x86/vmce: fill MSR_IA32_MCG_STATUS on all vcpus in broadcast case Haozhong Zhang
2017-02-24 15:07   ` Jan Beulich
2017-02-24 10:52 ` [PATCH 5/7] x86/mce: clear MSR_IA32_MCG_STATUS by writing 0 Haozhong Zhang
2017-02-24 13:29   ` Boris Ostrovsky
2017-02-24 15:07   ` Jan Beulich
2017-02-24 10:52 ` Haozhong Zhang [this message]
2017-02-24 15:14   ` [PATCH 6/7] xen/mce: make ASSERT's about mce_dhandler_num in mce_action() Intel only Jan Beulich
2017-02-24 10:52 ` [PATCH 7/7] tools/xen-mceinj: fix the type of cpu number Haozhong Zhang
2017-02-26 17:47   ` Wei Liu

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