From: Julien Grall <julien.grall@arm.com>
To: xen-devel@lists.xen.org
Cc: andre.przywara@arm.com, Julien Grall <julien.grall@arm.com>,
sstabellini@kernel.org, punit.agrawal@arm.com
Subject: [PATCH 2/3] xen/arm: Introduce INVALID_VCPU_ID
Date: Wed, 8 Mar 2017 18:06:01 +0000 [thread overview]
Message-ID: <20170308180602.24430-3-julien.grall@arm.com> (raw)
In-Reply-To: <20170308180602.24430-1-julien.grall@arm.com>
Define INVALID_VCPU_ID as MAX_VIRT_CPUS to avoid casting problem later
on. At the moment it can always fit in uint8_t.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/include/asm-arm/config.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/xen/include/asm-arm/config.h b/xen/include/asm-arm/config.h
index ba61f65a39..6a92f53f72 100644
--- a/xen/include/asm-arm/config.h
+++ b/xen/include/asm-arm/config.h
@@ -46,6 +46,8 @@
#define MAX_VIRT_CPUS 8
#endif
+#define INVALID_VCPU_ID MAX_VIRT_CPUS
+
#define asmlinkage /* Nothing needed */
#define __LINUX_ARM_ARCH__ 7
--
2.11.0
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next prev parent reply other threads:[~2017-03-08 18:06 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-08 18:05 [PATCH 0/3] xen/arm: p2m: Perform local invalidation on vCPU migration Julien Grall
2017-03-08 18:06 ` [PATCH 1/3] xen/arm: hvm_domain does not need to be cacheline aligned Julien Grall
2017-03-08 18:30 ` Stefano Stabellini
2017-03-08 18:06 ` Julien Grall [this message]
2017-03-08 18:31 ` [PATCH 2/3] xen/arm: Introduce INVALID_VCPU_ID Stefano Stabellini
2017-03-08 18:06 ` [PATCH 3/3] xen/arm: p2m: Perform local TLB invalidation on vCPU migration Julien Grall
2017-03-08 18:58 ` Stefano Stabellini
2017-03-08 19:27 ` Julien Grall
2017-03-08 19:48 ` Stefano Stabellini
2017-03-08 21:37 ` Julien Grall
2017-03-14 22:39 ` Stefano Stabellini
2017-03-14 23:23 ` Julien Grall
2017-03-14 23:29 ` Stefano Stabellini
2017-03-08 21:37 ` Julien Grall
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