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From: Yi Sun <yi.y.sun@linux.intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
	he.chen@linux.intel.com, andrew.cooper3@citrix.com,
	dario.faggioli@citrix.com, ian.jackson@eu.citrix.com,
	mengxu@cis.upenn.edu, xen-devel@lists.xenproject.org,
	chao.p.peng@linux.intel.com
Subject: Re: [PATCH v8 06/24] x86: refactor psr: implement get hw info flow.
Date: Fri, 10 Mar 2017 09:43:20 +0800	[thread overview]
Message-ID: <20170310014320.GD17458@yi.y.sun> (raw)
In-Reply-To: <58C02E2502000078001414BD@prv-mh.provo.novell.com>

On 17-03-08 08:15:33, Jan Beulich wrote:
> >>> On 15.02.17 at 09:49, <yi.y.sun@linux.intel.com> wrote:
> > --- a/xen/arch/x86/psr.c
> > +++ b/xen/arch/x86/psr.c
> > @@ -84,6 +84,7 @@ enum psr_feat_type {
> >      PSR_SOCKET_L3_CAT = 0,
> >      PSR_SOCKET_L3_CDP,
> >      PSR_SOCKET_L2_CAT,
> > +    PSR_SOCKET_UNKNOWN = 0xFFFF,
> 
> Any reason to use this value, instead of just the next sequential one?
> 
This is an error value used below, in 'psr_cbm_type_to_feat_type'. To make it
explicitly different, I assign a big value to it.

> > @@ -182,6 +186,24 @@ static void free_feature(struct psr_socket_info *info)
> >      }
> >  }
> >  
> > +static enum psr_feat_type psr_cbm_type_to_feat_type(enum cbm_type type)
> > +{
> > +    enum psr_feat_type feat_type;
> > +
> > +    /* Judge if feature is enabled. */
> > +    switch ( type )
> > +    {
> > +    case PSR_CBM_TYPE_L3:
> > +        feat_type = PSR_SOCKET_L3_CAT;
> > +        break;
> > +    default:
> > +        feat_type = PSR_SOCKET_UNKNOWN;
> > +        break;
> > +    }
> > +
> > +    return feat_type;
> > +}
> 
> The comment ahead of the switch() doesn't seem to describe what's
> being done - there certainly is no check here whether anything is
> enabled or disabled.
> 
Sorry for that, will remove the comment.

> > @@ -225,8 +247,22 @@ static unsigned int l3_cat_get_cos_max(const struct 
> > feat_node *feat)
> >      return feat->info.l3_cat_info.cos_max;
> >  }
> >  
> > +static bool l3_cat_get_feat_info(const struct feat_node *feat,
> > +                                 uint32_t data[], unsigned int array_len)
> > +{
> > +    if ( !data || 3 > array_len )
> 
> I think the 3 here was picked upon already: This check does not
> guarantee there's no array overrun ...
> 
Yes, Roger has suggested to change it to 'array_len != PSR_INFO_SIZE'.

> > +        return false;
> > +
> > +    data[CBM_LEN] = feat->info.l3_cat_info.cbm_len;
> > +    data[COS_MAX] = feat->info.l3_cat_info.cos_max;
> > +    data[PSR_FLAG] = 0;
> 
> ... anywhere here. For that you'd need a *_MAX- or *_NUM-type
> constant (defined next to the array index constants).
> 
This is defined in next version.

[...]
> > --- a/xen/include/asm-x86/psr.h
> > +++ b/xen/include/asm-x86/psr.h
> > @@ -19,19 +19,24 @@
> >  #include <xen/types.h>
> >  
> >  /* CAT cpuid level */
> > -#define PSR_CPUID_LEVEL_CAT   0x10
> > +#define PSR_CPUID_LEVEL_CAT        0x10
> >  
> >  /* Resource Type Enumeration */
> > -#define PSR_RESOURCE_TYPE_L3            0x2
> > +#define PSR_RESOURCE_TYPE_L3       0x2
> >  
> >  /* L3 Monitoring Features */
> > -#define PSR_CMT_L3_OCCUPANCY           0x1
> > +#define PSR_CMT_L3_OCCUPANCY       0x1
> >  
> >  /* CDP Capability */
> > -#define PSR_CAT_CDP_CAPABILITY       (1u << 2)
> > +#define PSR_CAT_CDP_CAPABILITY     (1u << 2)
> >  
> >  /* L3 CDP Enable bit*/
> > -#define PSR_L3_QOS_CDP_ENABLE_BIT       0x0
> > +#define PSR_L3_QOS_CDP_ENABLE_BIT  0x0
> 
> Are all these adjustments really needed here?
> 
Per Wei's suggestion to make codes neat.

> > +/* Used by psr_get_info() */
> > +#define CBM_LEN                    0
> > +#define COS_MAX                    1
> > +#define PSR_FLAG                   2
> 
> Neither comment nor names are helpful to understand the purpose of
> these constants. How about PSR_INFO_IDX_* or some such?
> 
Ok will do it in next version.

> Jan

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  reply	other threads:[~2017-03-10  1:43 UTC|newest]

Thread overview: 122+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-15  8:49 [PATCH v8 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-02-15  8:49 ` [PATCH v8 01/24] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-02-15 16:49   ` Konrad Rzeszutek Wilk
2017-02-26 17:40   ` Wei Liu
2017-02-15  8:49 ` [PATCH v8 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-02-26 17:40   ` Wei Liu
2017-02-15  8:49 ` [PATCH v8 03/24] x86: refactor psr: implement main data structures Yi Sun
2017-02-28 11:58   ` Roger Pau Monné
2017-03-01  5:10     ` Yi Sun
2017-03-01  8:17       ` Jan Beulich
2017-03-01  8:28         ` Yi Sun
2017-03-01  8:39           ` Jan Beulich
2017-03-01  8:49       ` Roger Pau Monn�
2017-03-01  8:54         ` Jan Beulich
2017-03-01  9:00           ` Roger Pau Monn�
2017-02-15  8:49 ` [PATCH v8 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-02-26 17:41   ` Wei Liu
2017-02-27  6:42     ` Yi Sun
2017-02-27 11:45       ` Wei Liu
2017-02-27  8:41     ` Jan Beulich
2017-03-08 14:56   ` Jan Beulich
2017-03-10  1:32     ` Yi Sun
2017-03-10  8:56       ` Jan Beulich
2017-03-13  2:18         ` Yi Sun
2017-02-15  8:49 ` [PATCH v8 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-02-26 17:41   ` Wei Liu
2017-03-08 15:04   ` Jan Beulich
2017-02-15  8:49 ` [PATCH v8 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-02-26 17:41   ` Wei Liu
2017-02-28 12:34   ` Roger Pau Monné
2017-03-08 15:15   ` Jan Beulich
2017-03-10  1:43     ` Yi Sun [this message]
2017-03-10  8:57       ` Jan Beulich
2017-03-10  9:01         ` Yi Sun
2017-02-15  8:49 ` [PATCH v8 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-02-28 12:44   ` Roger Pau Monné
2017-03-01  5:21     ` Yi Sun
2017-03-08 15:35   ` Jan Beulich
2017-03-10  1:50     ` Yi Sun
2017-03-10  9:05       ` Jan Beulich
2017-02-15  8:49 ` [PATCH v8 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-02-26 17:41   ` Wei Liu
2017-02-27  7:06     ` Yi Sun
2017-02-27 10:55       ` Jan Beulich
2017-02-28 13:58   ` Roger Pau Monné
2017-03-01  6:23     ` Yi Sun
2017-03-08 16:07   ` Jan Beulich
2017-03-10  2:54     ` Yi Sun
2017-03-10  9:09       ` Jan Beulich
2017-03-13  2:36         ` Yi Sun
2017-03-13 12:35           ` Jan Beulich
2017-03-14  2:43             ` Yi Sun
2017-03-14  6:29               ` Jan Beulich
2017-03-14  9:21                 ` Yi Sun
2017-03-14 10:24                   ` Jan Beulich
2017-03-15  2:52                     ` Yi Sun
2017-03-15  7:40                       ` Jan Beulich
2017-03-15  8:18                         ` Yi Sun
2017-03-15  8:32                           ` Jan Beulich
2017-03-10  7:46     ` Yi Sun
2017-03-10  9:10       ` Jan Beulich
2017-02-15  8:49 ` [PATCH v8 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-02-26 17:43   ` Wei Liu
2017-02-27  7:11     ` Yi Sun
2017-02-27 11:45       ` Wei Liu
2017-03-08 16:54   ` Jan Beulich
2017-03-10  3:21     ` Yi Sun
2017-03-10  9:15       ` Jan Beulich
2017-03-13  2:43         ` Yi Sun
2017-03-13 12:37           ` Jan Beulich
2017-03-14  2:20             ` Yi Sun
2017-03-14  6:32               ` Jan Beulich
2017-02-15  8:49 ` [PATCH v8 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-02-26 17:43   ` Wei Liu
2017-02-27  7:16     ` Yi Sun
2017-03-08 17:03   ` Jan Beulich
2017-03-10  5:35     ` Yi Sun
2017-03-10  9:21       ` Jan Beulich
2017-02-15  8:49 ` [PATCH v8 11/24] x86: refactor psr: set value: implement cos id picking flow Yi Sun
2017-02-26 17:43   ` Wei Liu
2017-03-09 14:10   ` Jan Beulich
2017-03-10  5:40     ` Yi Sun
2017-03-10  9:24       ` Jan Beulich
2017-02-15  8:49 ` [PATCH v8 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-02-15  8:49 ` [PATCH v8 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2017-02-28 14:52   ` Roger Pau Monné
2017-03-09 14:53   ` Jan Beulich
2017-03-10  5:50     ` Yi Sun
2017-02-15  8:49 ` [PATCH v8 14/24] x86: refactor psr: implement get hw info " Yi Sun
2017-02-26 17:43   ` Wei Liu
2017-02-28 14:54   ` Roger Pau Monné
2017-02-15  8:49 ` [PATCH v8 15/24] x86: refactor psr: implement get value " Yi Sun
2017-02-28 14:59   ` Roger Pau Monné
2017-02-15  8:49 ` [PATCH v8 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2017-02-26 17:43   ` Wei Liu
2017-02-27  7:19     ` Yi Sun
2017-02-15  8:49 ` [PATCH v8 17/24] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-02-28 15:15   ` Roger Pau Monné
2017-03-01  6:35     ` Yi Sun
2017-03-09 15:04   ` Jan Beulich
2017-03-10  5:52     ` Yi Sun
2017-02-15  8:49 ` [PATCH v8 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2017-02-28 15:18   ` Roger Pau Monné
2017-03-09 15:13   ` Jan Beulich
2017-03-10  5:57     ` Yi Sun
2017-03-10  9:26       ` Jan Beulich
2017-02-15  8:49 ` [PATCH v8 19/24] x86: L2 CAT: implement get value flow Yi Sun
2017-02-28 15:20   ` Roger Pau Monné
2017-02-15  8:49 ` [PATCH v8 20/24] x86: L2 CAT: implement set " Yi Sun
2017-02-28 15:25   ` Roger Pau Monné
2017-03-01  6:59     ` Yi Sun
2017-03-01 11:31       ` Dario Faggioli
2017-02-15  8:49 ` [PATCH v8 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-02-15  8:49 ` [PATCH v8 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-02-15  8:49 ` [PATCH v8 23/24] tools: L2 CAT: support set " Yi Sun
2017-02-15  8:49 ` [PATCH v8 24/24] docs: add L2 CAT description in docs Yi Sun
2017-02-15 16:14 ` [PATCH v8 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Konrad Rzeszutek Wilk
2017-02-26 18:00 ` Wei Liu
2017-02-28 11:02 ` Roger Pau Monné
2017-03-01  4:54   ` Yi Sun
2017-03-01  8:35     ` Roger Pau Monn�
2017-03-01  8:40       ` Yi Sun

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