From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: "Roger Pau Monné" <roger.pau@citrix.com>, venu.busireddy@oracle.com
Cc: "Edgar Iglesias (edgar.iglesias@xilinx.com)"
<edgar.iglesias@xilinx.com>,
Stefano Stabellini <sstabellini@kernel.org>,
Wei Chen <Wei.Chen@arm.com>, Steve Capper <Steve.Capper@arm.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Jiandi An <anjiandi@codeaurora.org>,
Julien Grall <julien.grall@linaro.org>,
alistair.francis@xilinx.com,
Punit Agrawal <punit.agrawal@arm.com>,
Campbell Sean <scampbel@codeaurora.org>,
xen-devel <xen-devel@lists.xenproject.org>,
"manish.jaggi@caviumnetworks.com"
<manish.jaggi@caviumnetworks.com>,
Shanker Donthineni <shankerd@codeaurora.org>
Subject: Re: [early RFC] ARM PCI Passthrough design document
Date: Wed, 15 Mar 2017 08:42:04 -0400 [thread overview]
Message-ID: <20170315124201.GE28643@localhost.localdomain> (raw)
In-Reply-To: <20170315120728.vwnjq4aykfgtq2yv@dhcp-3-128.uk.xensource.com>
On Wed, Mar 15, 2017 at 12:07:28PM +0000, Roger Pau Monné wrote:
> On Fri, Mar 10, 2017 at 10:28:43AM -0500, Konrad Rzeszutek Wilk wrote:
> > On Fri, Mar 10, 2017 at 12:23:18PM +0900, Roger Pau Monné wrote:
> > > On Thu, Mar 09, 2017 at 07:29:34PM -0500, Konrad Rzeszutek Wilk wrote:
> > > > On Thu, Mar 09, 2017 at 01:26:45PM +0000, Julien Grall wrote:
> > > > > Hi Konrad,
> > > > >
> > > > > On 09/03/17 11:17, Konrad Rzeszutek Wilk wrote:
> > > > > > On Thu, Mar 09, 2017 at 11:59:51AM +0900, Roger Pau Monné wrote:
> > > > > > > On Wed, Mar 08, 2017 at 02:12:09PM -0500, Konrad Rzeszutek Wilk wrote:
> > > > > > > > On Wed, Mar 08, 2017 at 07:06:23PM +0000, Julien Grall wrote:
> > > > > > > > .. this as for SR-IOV devices you need the drivers to kick the hardware
> > > > > > > > to generate the new bus addresses. And those (along with the BAR regions) are
> > > > > > > > not visible in ACPI (they are constructued dynamically).
> > > > > > >
> > > > > > > There's already code in Xen [0] to find out the size of the BARs of SR-IOV
> > > > > > > devices, but I'm not sure what's the intended usage of that, does it need to
> > > > > > > happen _after_ the driver in Dom0 has done whatever magic for this to work?
> > > > > >
> > > > > > Yes. This is called via the PHYSDEVOP_pci_device_add hypercall when
> > > > > > the device driver in dom0 has finished "creating" the VF. See drivers/xen/pci.c
> > > > >
> > > > > We are thinking to not use PHYSDEVOP_pci_device_add hypercall for ARM and do
> > > > > the PCI scanning in Xen.
> > > > >
> > > > > If I understand correctly what you said, only the PCI driver will be able to
> > > > > kick SR-IOV device and Xen would not be able to detect the device until it
> > > > > has been fully configured. So it would mean that we have to keep
> > > > > PHYSDEVOP_pci_device_add around to know when Xen can use the device.
> > > > >
> > > > > Am I correct?
> > > >
> > > > Yes. Unless the PCI drivers come up with some other way to tell the
> > > > OS that oh, hey, there is this new PCI device with this BDF.
> > > >
> > > > Or the underlaying bus on ARM can send some 'new device' information?
> > >
> > > Hm, is this something standard between all the SR-IOV implementations, or each
> > > vendors have their own sauce?
> >
> > Gosh, all of them have their own sauce. The only thing that is the same
> > is that suddenly behind the PF device there are PCI devies that are responding
> > to 0xcfc requests. MAgic!
>
> I'm reading the PCI SR-IOV 1.1 spec, and I think we don't need to wait for the
> device driver in Dom0 in order to get the information of the VF devices, what
> Xen cares about is the position of the BARs (so that they can be mapped into
> Dom0 at boot), and the PCI SBDF of each PF/VF, so that Xen can trap accesses to
> it.
>
> AFAICT both of this can be obtained without any driver-specific code, since
> it's all contained in the PCI SR-IOV spec (but maybe I'm missing something).
CC-ing Venu,
Roger, could you point out which of the chapters has this?
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next prev parent reply other threads:[~2017-03-15 12:42 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-29 14:04 [early RFC] ARM PCI Passthrough design document Julien Grall
2016-12-29 14:16 ` Jaggi, Manish
2016-12-29 17:03 ` Julien Grall
2016-12-29 18:41 ` Jaggi, Manish
2016-12-29 19:38 ` Julien Grall
2017-01-04 0:24 ` Stefano Stabellini
2017-01-24 14:28 ` Julien Grall
2017-01-24 20:07 ` Stefano Stabellini
2017-01-25 11:21 ` Roger Pau Monné
2017-01-25 18:53 ` Julien Grall
2017-01-31 16:53 ` Edgar E. Iglesias
2017-01-31 17:09 ` Julien Grall
2017-01-31 19:06 ` Edgar E. Iglesias
2017-01-31 22:08 ` Stefano Stabellini
2017-02-01 19:04 ` Julien Grall
2017-02-01 19:31 ` Stefano Stabellini
2017-02-01 20:24 ` Julien Grall
2017-02-02 15:33 ` Edgar E. Iglesias
2017-02-02 23:12 ` Stefano Stabellini
2017-02-02 23:44 ` Edgar E. Iglesias
2017-02-10 1:01 ` Stefano Stabellini
2017-02-13 15:39 ` Julien Grall
2017-02-13 19:59 ` Stefano Stabellini
2017-02-14 17:21 ` Julien Grall
2017-02-14 18:20 ` Stefano Stabellini
2017-02-14 20:18 ` Julien Grall
2017-02-13 15:35 ` Julien Grall
2017-02-22 4:03 ` Edgar E. Iglesias
2017-02-23 16:47 ` Julien Grall
2017-03-02 21:13 ` Edgar E. Iglesias
2017-02-02 15:40 ` Roger Pau Monné
2017-02-13 16:22 ` Julien Grall
2017-01-31 21:58 ` Stefano Stabellini
2017-02-01 20:12 ` Julien Grall
2017-02-01 10:55 ` Roger Pau Monné
2017-02-01 18:50 ` Stefano Stabellini
2017-02-10 9:48 ` Roger Pau Monné
2017-02-10 10:11 ` Paul Durrant
2017-02-10 12:57 ` Roger Pau Monne
2017-02-10 13:02 ` Paul Durrant
2017-02-10 21:04 ` Stefano Stabellini
2017-02-02 12:38 ` Julien Grall
2017-02-02 23:06 ` Stefano Stabellini
2017-03-08 19:06 ` Julien Grall
2017-03-08 19:12 ` Konrad Rzeszutek Wilk
2017-03-08 19:55 ` Stefano Stabellini
2017-03-08 21:51 ` Julien Grall
2017-03-09 2:59 ` Roger Pau Monné
2017-03-09 11:17 ` Konrad Rzeszutek Wilk
2017-03-09 13:26 ` Julien Grall
2017-03-10 0:29 ` Konrad Rzeszutek Wilk
2017-03-10 3:23 ` Roger Pau Monné
2017-03-10 15:28 ` Konrad Rzeszutek Wilk
2017-03-15 12:07 ` Roger Pau Monné
2017-03-15 12:42 ` Konrad Rzeszutek Wilk [this message]
2017-03-15 12:56 ` Roger Pau Monné
2017-03-15 15:11 ` Venu Busireddy
2017-03-15 16:38 ` Roger Pau Monn?
2017-03-15 16:54 ` Venu Busireddy
2017-03-15 17:00 ` Roger Pau Monn?
2017-05-03 12:38 ` Julien Grall
2017-05-03 12:53 ` Julien Grall
2017-01-25 4:23 ` Manish Jaggi
2017-01-06 15:12 ` Roger Pau Monné
2017-01-06 21:16 ` Stefano Stabellini
2017-01-24 17:17 ` Julien Grall
2017-01-25 11:42 ` Roger Pau Monné
2017-01-31 15:59 ` Julien Grall
2017-01-31 22:03 ` Stefano Stabellini
2017-02-01 10:28 ` Roger Pau Monné
2017-02-01 18:45 ` Stefano Stabellini
2017-01-06 16:27 ` Edgar E. Iglesias
2017-01-06 21:12 ` Stefano Stabellini
2017-01-09 17:50 ` Edgar E. Iglesias
2017-01-19 5:09 ` Manish Jaggi
2017-01-24 17:43 ` Julien Grall
2017-01-25 4:37 ` Manish Jaggi
2017-01-25 15:25 ` Julien Grall
2017-01-30 7:41 ` Manish Jaggi
2017-01-31 13:33 ` Julien Grall
2017-05-19 6:38 ` Goel, Sameer
2017-05-19 16:48 ` Julien Grall
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