xen-devel.lists.xenproject.org archive mirror
 help / color / mirror / Atom feed
From: Haozhong Zhang <haozhong.zhang@intel.com>
To: xen-devel@lists.xen.org
Cc: Haozhong Zhang <haozhong.zhang@intel.com>,
	Jan Beulich <jbeulich@suse.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>
Subject: [PATCH v2 07/12] x86/vmce: emulate MSR_IA32_MCG_EXT_CTL
Date: Fri, 17 Mar 2017 14:46:09 +0800	[thread overview]
Message-ID: <20170317064614.23539-8-haozhong.zhang@intel.com> (raw)
In-Reply-To: <20170317064614.23539-1-haozhong.zhang@intel.com>

If MCG_LMCE_P is present in guest MSR_IA32_MCG_CAP, then allow guest
to read/write MSR_IA32_MCG_EXT_CTL.

Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
---
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>

Changes in v2:
 * Remove stray blank in the code comment.
 * Move the success branch to the front when handling MSR_IA32_MCG_EXT_CTL.
 * Move lmce_enabled before bank[] in struct vmce.
 * Increase XEN_DOMCTL_INTERFACE_VERSION by 1.
---
 xen/arch/x86/cpu/mcheck/vmce.c         | 34 +++++++++++++++++++++++++++++++++-
 xen/include/asm-x86/mce.h              |  1 +
 xen/include/public/arch-x86/hvm/save.h |  2 ++
 xen/include/public/domctl.h            |  2 +-
 4 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
index 058bb91..c396d07 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -90,6 +90,7 @@ int vmce_restore_vcpu(struct vcpu *v, const struct hvm_vmce_vcpu *ctxt)
     v->arch.vmce.mcg_cap = ctxt->caps;
     v->arch.vmce.bank[0].mci_ctl2 = ctxt->mci_ctl2_bank0;
     v->arch.vmce.bank[1].mci_ctl2 = ctxt->mci_ctl2_bank1;
+    v->arch.vmce.lmce_enabled = ctxt->lmce_enabled;
 
     return 0;
 }
@@ -199,6 +200,26 @@ int vmce_rdmsr(uint32_t msr, uint64_t *val)
         mce_printk(MCE_VERBOSE, "MCE: %pv: rd MCG_CTL %#"PRIx64"\n", cur, *val);
         break;
 
+    case MSR_IA32_MCG_EXT_CTL:
+        /*
+         * If MCG_LMCE_P is present in guest MSR_IA32_MCG_CAP, the LMCE and LOCK
+         * bits are always set in guest MSR_IA32_FEATURE_CONTROL by Xen, so it
+         * does not need to check them here.
+         */
+        if ( cur->arch.vmce.mcg_cap & MCG_LMCE_P )
+        {
+            *val = cur->arch.vmce.lmce_enabled ? MCG_EXT_CTL_LMCE_EN : 0;
+            mce_printk(MCE_VERBOSE, "MCE: %pv: rd MCG_EXT_CTL %#"PRIx64"\n",
+                       cur, *val);
+        }
+        else
+        {
+            ret = -1;
+            mce_printk(MCE_VERBOSE, "MCE: %pv: rd MCG_EXT_CTL, not supported\n",
+                       cur);
+        }
+        break;
+
     default:
         ret = mce_bank_msr(cur, msr) ? bank_mce_rdmsr(cur, msr, val) : 0;
         break;
@@ -308,6 +329,16 @@ int vmce_wrmsr(uint32_t msr, uint64_t val)
         mce_printk(MCE_VERBOSE, "MCE: %pv: MCG_CAP is r/o\n", cur);
         break;
 
+    case MSR_IA32_MCG_EXT_CTL:
+        if ( (cur->arch.vmce.mcg_cap & MCG_LMCE_P) &&
+             !(val & ~MCG_EXT_CTL_LMCE_EN) )
+            cur->arch.vmce.lmce_enabled = (val & MCG_EXT_CTL_LMCE_EN);
+        else
+            ret = -1;
+        mce_printk(MCE_VERBOSE, "MCE: %pv: wr MCG_EXT_CTL %"PRIx64"%s\n",
+                   cur, val, (ret == -1) ? ", not supported" : "");
+        break;
+
     default:
         ret = mce_bank_msr(cur, msr) ? bank_mce_wrmsr(cur, msr, val) : 0;
         break;
@@ -326,7 +357,8 @@ static int vmce_save_vcpu_ctxt(struct domain *d, hvm_domain_context_t *h)
         struct hvm_vmce_vcpu ctxt = {
             .caps = v->arch.vmce.mcg_cap,
             .mci_ctl2_bank0 = v->arch.vmce.bank[0].mci_ctl2,
-            .mci_ctl2_bank1 = v->arch.vmce.bank[1].mci_ctl2
+            .mci_ctl2_bank1 = v->arch.vmce.bank[1].mci_ctl2,
+            .lmce_enabled = v->arch.vmce.lmce_enabled,
         };
 
         err = hvm_save_entry(VMCE_VCPU, v->vcpu_id, h, &ctxt);
diff --git a/xen/include/asm-x86/mce.h b/xen/include/asm-x86/mce.h
index 6b827ef..dee66b3 100644
--- a/xen/include/asm-x86/mce.h
+++ b/xen/include/asm-x86/mce.h
@@ -28,6 +28,7 @@ struct vmce {
     uint64_t mcg_cap;
     uint64_t mcg_status;
     spinlock_t lock;
+    bool lmce_enabled; /* guest MSR_IA32_MCG_EXT_CTL.LMCE_EN (bit 0) */
     struct vmce_bank bank[GUEST_MC_BANK_NUM];
 };
 
diff --git a/xen/include/public/arch-x86/hvm/save.h b/xen/include/public/arch-x86/hvm/save.h
index 419a3b2..76374fc 100644
--- a/xen/include/public/arch-x86/hvm/save.h
+++ b/xen/include/public/arch-x86/hvm/save.h
@@ -599,6 +599,8 @@ struct hvm_vmce_vcpu {
     uint64_t caps;
     uint64_t mci_ctl2_bank0;
     uint64_t mci_ctl2_bank1;
+    uint8_t  lmce_enabled;
+    uint8_t  pad[7];
 };
 
 DECLARE_HVM_SAVE_TYPE(VMCE_VCPU, 18, struct hvm_vmce_vcpu);
diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h
index 85cbb7c..2842589 100644
--- a/xen/include/public/domctl.h
+++ b/xen/include/public/domctl.h
@@ -37,7 +37,7 @@
 #include "hvm/save.h"
 #include "memory.h"
 
-#define XEN_DOMCTL_INTERFACE_VERSION 0x0000000c
+#define XEN_DOMCTL_INTERFACE_VERSION 0x0000000d
 
 /*
  * NB. xen_domctl.domain is an IN/OUT parameter for this operation.
-- 
2.10.1


_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel

  parent reply	other threads:[~2017-03-17  6:46 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-17  6:46 [PATCH v2 00/12] Add LMCE support Haozhong Zhang
2017-03-17  6:46 ` [PATCH v2 01/12] xen/mce: switch bool_t/1/0 to bool/true/false Haozhong Zhang
2017-03-20 13:04   ` Jan Beulich
2017-03-17  6:46 ` [PATCH v2 02/12] x86/mce_intel: refine messages of MCA capabilities Haozhong Zhang
2017-03-20 13:10   ` Jan Beulich
2017-03-17  6:46 ` [PATCH v2 03/12] xen/mce: add blank lines between non-fall-through switch case blocks Haozhong Zhang
2017-03-20 13:12   ` Jan Beulich
2017-03-17  6:46 ` [PATCH v2 04/12] x86/mce: handle LMCE locally Haozhong Zhang
2017-03-20 14:24   ` Jan Beulich
2017-03-21  7:04     ` Haozhong Zhang
2017-03-17  6:46 ` [PATCH v2 05/12] x86/mce_intel: detect and enable LMCE on Intel host Haozhong Zhang
2017-03-20 14:30   ` Jan Beulich
2017-03-21  7:06     ` Haozhong Zhang
2017-03-21  8:05       ` Jan Beulich
2017-03-17  6:46 ` [PATCH v2 06/12] x86/vmx: expose LMCE feature via guest MSR_IA32_FEATURE_CONTROL Haozhong Zhang
2017-03-20 16:10   ` Jan Beulich
2017-03-17  6:46 ` Haozhong Zhang [this message]
2017-03-20 16:17   ` [PATCH v2 07/12] x86/vmce: emulate MSR_IA32_MCG_EXT_CTL Jan Beulich
2017-03-17  6:46 ` [PATCH v2 08/12] x86/vmce: enable injecting LMCE to guest on Intel host Haozhong Zhang
2017-03-20 16:25   ` Jan Beulich
2017-03-22  9:19     ` Haozhong Zhang
2017-03-17  6:46 ` [PATCH v2 09/12] x86/vmce, tools/libxl: expose LMCE capability in guest MSR_IA32_MCG_CAP Haozhong Zhang
2017-03-20 16:33   ` Jan Beulich
2017-03-21  7:14     ` Haozhong Zhang
2017-03-20 18:27   ` Ian Jackson
2017-03-21  7:29     ` Haozhong Zhang
2017-03-21  7:35       ` Haozhong Zhang
2017-03-21  9:30     ` Jan Beulich
2017-03-27 15:34   ` Wei Liu
2017-03-17  6:46 ` [PATCH v2 10/12] xen/mce: add support of vLMCE injection to XEN_MC_inject_v2 Haozhong Zhang
2017-03-20 16:37   ` Jan Beulich
2017-03-17  6:46 ` [PATCH v2 11/12] tools/libxc: add support of injecting MC# to specified CPUs Haozhong Zhang
2017-03-28 14:07   ` Wei Liu
2017-03-17  6:46 ` [PATCH v2 12/12] tools/xen-mceinj: add support of injecting LMCE Haozhong Zhang
2017-03-28 14:08   ` Wei Liu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170317064614.23539-8-haozhong.zhang@intel.com \
    --to=haozhong.zhang@intel.com \
    --cc=andrew.cooper3@citrix.com \
    --cc=jbeulich@suse.com \
    --cc=xen-devel@lists.xen.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).