Re: [PATCH 02/18] xen/arm: Restore HCR_EL2 register

[Mark Rutland <mark.rutland@arm.com>]

On Wed, Mar 22, 2017 at 12:16:20PM +0000, Julien Grall wrote:
> (CC Mark for the TLB question)

[Adding Marc since he should understand this better than I do]

I've trimmed a lot of context here, since it wasn't clear if it was
relevant to the question. If there's something I've missed, please point
that out explicitly.

> I am not entirely sure if we can only restore HCR_RW. My concern is
> some of the bits are cached in the TLBs. Looking at the ARM ARM
> (both v7 and v8 see D4.7 in DDI0487A.k_iss10775): "In these
> descriptions, TLB entries for a translation regime for a particular
> Exception level are out of context when executing at a higher
> Exception level.". Which I interpret as TLB result cannot be cached
> when translating a guest VA to guest PA at EL2. So I guess restoring
> only HCR_RW might be fine.

My understanding is that when a translation regime is out-of-context,
the only requirement is that the core does not begin speculative walks
for that translation regime. See ARM DDI 0487A.k_iss10775, page D4-1735,
"Use of out-of-context translation regimes".

I believe that an explicit address translation involving a translation
regime can validly make use of (any part of) that regime's state and/or
allocate new TLB entries for that regime.

It looks like you're asking if you can avoid installing all of the
registers related to the EL1&0 regime when performing an EL1&0
translation at EL2, right?

I do not believe that is valid; my understanding is that all of the
relevant registers need to be installed first.

Thanks,
Mark.

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