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From: Yi Sun <yi.y.sun@linux.intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
	he.chen@linux.intel.com, andrew.cooper3@citrix.com,
	dario.faggioli@citrix.com, ian.jackson@eu.citrix.com,
	mengxu@cis.upenn.edu, xen-devel@lists.xenproject.org,
	chao.p.peng@linux.intel.com, roger.pau@citrix.com
Subject: Re: [PATCH v9 05/25] x86: refactor psr: L3 CAT: implement CPU init and free flow.
Date: Mon, 27 Mar 2017 12:41:50 +0800	[thread overview]
Message-ID: <20170327044150.GY17458@yi.y.sun> (raw)
In-Reply-To: <58D55CE2020000780014793E@prv-mh.provo.novell.com>

On 17-03-24 10:52:34, Jan Beulich wrote:
> >>> On 16.03.17 at 12:07, <yi.y.sun@linux.intel.com> wrote:
> > --- a/xen/arch/x86/psr.c
> > +++ b/xen/arch/x86/psr.c
> > @@ -18,6 +18,7 @@
> >  #include <xen/init.h>
> >  #include <xen/sched.h>
> >  #include <asm/psr.h>
> > +#include <asm/x86_emulate.h>
> 
> I'm pretty sure you don't need this. If anything you need
> processor.h (as that's where the previous patch put
> cpuid_count_leaf()), but I'm rather convinced that the header was
> already included indirectly at this point.
> 
Yes, you are right. It is indirectly included through 'sched.h'.

> > @@ -46,6 +50,9 @@
> >   */
> >  #define MAX_COS_REG_CNT  128
> >  
> > +/* CAT features use 1 COS register in one access. */
> > +#define CAT_COS_NUM      1
> 
> With it being stored into the feature node now I don't see why you
> need this constant anymore. And indeed it's being used exactly
> once.
> 
I remember somebody suggested me not to use constant but should define a
macro. As it is only used once, I will remove this and 'CDP_COS_NUM' in
later patch.

> > +/*
> > + * Declare global feature node for every feature to facilitate the feature
> > + * array creation. It is used to transiently store a spare node.
> > + */
> > +static struct feat_node *feat_l3_cat;
> > +
> > +/* Common functions */
> > +#define cat_default_val(len)                 \
> > +            ( (uint32_t)((1ul << len) - 1) )
> 
> Pretty odd construct, which I guess you use to avoid the
> undefined-ness when len == 32. But this can be had without
> extra cast, assuming len is in [1,32]:
> 
> #define cat_default_val(len) (0xffffffff >> (32 - (len)))
> 
> Also - stray blanks and missing parentheses around the use of macro
> parameter.
> 
Thanks for the suggestion! Will change it.

> > +/*
> > + * Use this function to check if any allocation feature has been enabled
> > + * in cmdline.
> > + */
> > +static bool psr_alloc_feat_enabled(void)
> > +{
> > +    return ((!socket_info) ? false : true );
> 
> Stray parentheses (all of them actually) and blank. Even more, why
> not simply
> 
>     return socket_info;
> 
> ?
> 
How about 'return !!socket_info'?

> > +static void free_feature(struct psr_socket_info *info)
> > +{
> > +    unsigned int i;
> > +
> > +    if ( !info )
> > +        return;
> > +
> > +    /*
> > +     * Free resources of features. The global feature object, e.g. feat_l3_cat,
> > +     * may not be freed here if it is not added into array. It is simply being
> > +     * kept until the next CPU online attempt.
> > +     */
> > +    for ( i = 0; i < PSR_SOCKET_MAX_FEAT; i++ )
> > +    {
> > +        if ( !info->features[i] )
> > +            continue;
> > +
> > +        xfree(info->features[i]);
> > +        info->features[i] = NULL;
> > +        __clear_bit(i, &info->feat_mask);
> > +    }
> > +}
> 
> What the function does suggests its name ought to be
> free_features().
> 
Ok, will modify it.

> > +static void cat_init_feature(struct cpuid_leaf regs,
> 
> I'm sure I've asked before to not pass structures by value. And
> once you switch to a pointer, please don't forget to constify it.
> 
Will correct this, thanks!

> > +                             struct feat_node *feat,
> > +                             struct psr_socket_info *info,
> > +                             enum psr_feat_type type)
> > +{
> > +    unsigned int socket, i;
> > +    struct psr_cat_hw_info cat = { };
> > +    uint64_t val;
> > +
> > +    /* No valid value so do not enable feature. */
> > +    if ( !regs.a || !regs.d )
> > +        return;
> > +
> > +    cat.cbm_len = (regs.a & CAT_CBM_LEN_MASK) + 1;
> > +    cat.cos_max = min(opt_cos_max, regs.d & CAT_COS_MAX_MASK);
> > +
> > +    /* cos=0 is reserved as default cbm(all bits within cbm_len are 1). */
> > +    feat->cos_reg_val[0] = cat_default_val(cat.cbm_len);
> > +    /*
> > +     * To handle cpu offline and then online case, we need read MSRs back to
> > +     * save values into cos_reg_val array.
> > +     */
> > +    for ( i = 1; i <= cat.cos_max; i++ )
> > +    {
> > +        rdmsrl(MSR_IA32_PSR_L3_MASK(i), val);
> > +        feat->cos_reg_val[i] = (uint32_t)val;
> > +    }
> 
> You mention this in the changes done, but I don't understand why
> you do this. What meaning to these values have to you? If you
> want hardware and cached values to match up, the much more
> conventional way of enforcing this would be to write the values
> you actually want (normally all zero).
> 
When all cpus on a socket are offline, the free_feature() is called to free
features resources so that the values saved in cos_reg_val[] are lost. When the
socket is online again, features are allocated again so that cos_reg_val[]
members are all initialized to 0. Only is cos_reg_val[0] initialized to default
value in this function in old codes.

But domain is still alive so that its cos id on the socket is kept. The
corresponding MSR value is kept too per test. To make cos_reg_val[] values be
same as HW to not to mislead user, we should read back the valid values on HW
into cos_reg_val[].

> > +    feat->info.cat_info = cat;
> > +    feat->cos_num = CAT_COS_NUM;
> > +
> > +    /* Add this feature into array. */
> > +    info->features[type] = feat;
> > +
> > +    ASSERT(!test_bit(type, &info->feat_mask));
> > +    __set_bit(type, &info->feat_mask);
> 
>     if ( __test_and_set_bit(type, &info->feat_mask) )
>         ASSERT_UNREACHABLE();
> 
Thanks!

> > +    socket = cpu_to_socket(smp_processor_id());
> > +    if ( !opt_cpu_info )
> > +        return;
> > +
> > +    printk(XENLOG_INFO "%s CAT: enabled on socket %u, cos_max:%u, cbm_len:%u\n",
> > +           ((type == PSR_SOCKET_L3_CAT) ? "L3" : "L2"),
> > +           socket, feat->info.cat_info.cos_max,
> > +           feat->info.cat_info.cbm_len);
> > +
> > +    return;
> 
> Pointless statement at end of function.
> 
Will remove it.

> > +/* L3 CAT ops */
> > +static const struct feat_ops l3_cat_ops = {
> > +};
> 
> Leaving an already declared function pointer as NULL? Please don't.
> 
Ok, will consider to move it and below code into later patch.
    feat->ops = l3_cat_ops;

> >  static void psr_cpu_init(void)
> >  {
> > +    struct psr_socket_info *info;
> > +    unsigned int socket, i;
> > +    unsigned int cpu = smp_processor_id();
> > +    struct feat_node *feat;
> > +    struct cpuid_leaf regs;
> > +
> > +    if ( !psr_alloc_feat_enabled() || !boot_cpu_has(X86_FEATURE_PQE) )
> > +        goto assoc_init;
> > +
> > +    if ( boot_cpu_data.cpuid_level < PSR_CPUID_LEVEL_CAT )
> > +    {
> > +        setup_clear_cpu_cap(X86_FEATURE_PQE);
> > +        goto assoc_init;
> > +    }
> > +
> > +    socket = cpu_to_socket(cpu);
> > +    info = socket_info + socket;
> > +    if ( info->feat_mask )
> > +        goto assoc_init;
> > +
> > +    for ( i = 0; i < PSR_SOCKET_MAX_FEAT; i++ )
> > +        info->features[i] = NULL;
> 
> You've xzalloc()ed this memory - why do you need this loop?
> 
Hmm, no need indeed. Will remove this.

> > +    spin_lock_init(&info->ref_lock);
> > +
> > +    cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 0, &regs);
> > +    if ( regs.b & PSR_RESOURCE_TYPE_L3 )
> > +    {
> > +        cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 1, &regs);
> > +
> > +        feat = feat_l3_cat;
> > +        feat_l3_cat = NULL;
> > +        feat->ops = l3_cat_ops;
> > +
> > +        cat_init_feature(regs, feat, info, PSR_SOCKET_L3_CAT);
> > +    }
> > +
> > +assoc_init:
> 
> Labels indented by at least on space please.
> 
Got it, thanks!

> Jan

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  reply	other threads:[~2017-03-27  4:41 UTC|newest]

Thread overview: 105+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-16 11:07 [PATCH v9 00/25] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-03-16 11:07 ` [PATCH v9 01/25] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-03-16 11:07 ` [PATCH v9 02/25] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-03-16 11:07 ` [PATCH v9 03/25] x86: refactor psr: implement main data structures Yi Sun
2017-03-24 16:19   ` Jan Beulich
2017-03-27  2:38     ` Yi Sun
2017-03-27  6:20       ` Jan Beulich
2017-03-27  7:12         ` Yi Sun
2017-03-27  7:37           ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 04/25] x86: move cpuid_count_leaf from cpuid.c to processor.h Yi Sun
2017-03-24 16:22   ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 05/25] x86: refactor psr: L3 CAT: implement CPU init and free flow Yi Sun
2017-03-24 16:52   ` Jan Beulich
2017-03-27  4:41     ` Yi Sun [this message]
2017-03-27  6:34       ` Jan Beulich
2017-03-27  8:16         ` Yi Sun
2017-03-27  8:43           ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 06/25] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows Yi Sun
2017-03-16 11:07 ` [PATCH v9 07/25] x86: refactor psr: L3 CAT: implement get hw info flow Yi Sun
2017-03-27  9:07   ` Jan Beulich
2017-03-27 12:24     ` Yi Sun
2017-03-27 12:51       ` Jan Beulich
2017-03-27 13:19         ` Yi Sun
2017-03-27 13:32           ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 08/25] x86: refactor psr: L3 CAT: implement get value flow Yi Sun
2017-03-27  9:23   ` Jan Beulich
2017-03-27 12:59     ` Yi Sun
2017-03-27 13:34       ` Jan Beulich
2017-03-28  2:13         ` Yi Sun
2017-03-28  8:10           ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 09/25] x86: refactor psr: L3 CAT: set value: implement framework Yi Sun
2017-03-27  9:59   ` Jan Beulich
2017-03-28  1:21     ` Yi Sun
2017-03-28  8:21       ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 10/25] x86: refactor psr: L3 CAT: set value: assemble features value array Yi Sun
2017-03-27 10:17   ` Jan Beulich
2017-03-28  3:12     ` Yi Sun
2017-03-28  8:05       ` Yi Sun
2017-03-28  8:36         ` Jan Beulich
2017-03-28  9:11           ` Yi Sun
2017-03-28  9:20             ` Jan Beulich
2017-03-28 10:18               ` Yi Sun
2017-03-28 10:39                 ` Jan Beulich
2017-03-28  8:34       ` Jan Beulich
2017-03-28 10:12         ` Yi Sun
2017-03-28 10:36           ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 11/25] x86: refactor psr: L3 CAT: set value: implement cos finding flow Yi Sun
2017-03-27 10:28   ` Jan Beulich
2017-03-28  3:26     ` Yi Sun
2017-03-28  8:41       ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 12/25] x86: refactor psr: L3 CAT: set value: implement cos id picking flow Yi Sun
2017-03-27 10:37   ` Jan Beulich
2017-03-28  4:58     ` Yi Sun
2017-03-28  8:45       ` Jan Beulich
2017-03-28 10:31         ` Yi Sun
2017-03-28 10:40           ` Jan Beulich
2017-03-28 11:59             ` Yi Sun
2017-03-28 12:20               ` Jan Beulich
2017-03-29  1:20                 ` Yi Sun
2017-03-29  1:36                   ` Yi Sun
2017-03-29  9:57                     ` Jan Beulich
2017-03-30  1:37                       ` Yi Sun
2017-03-30  1:39                         ` Yi Sun
2017-03-30 11:55                         ` Jan Beulich
2017-03-30 12:10                           ` Yi Sun
2017-03-31  8:47                             ` Jan Beulich
2017-03-31  9:12                               ` Yi Sun
2017-03-31  9:18                                 ` Yi Sun
2017-03-31 10:19                                 ` Jan Beulich
2017-03-31 12:40                                   ` Yi Sun
2017-03-31 12:51                                     ` Jan Beulich
2017-03-31 13:22                                       ` Yi Sun
2017-03-31 14:35                                         ` Jan Beulich
2017-03-31 14:46                                           ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 13/25] x86: refactor psr: L3 CAT: set value: implement write msr flow Yi Sun
2017-03-27 10:46   ` Jan Beulich
2017-03-28  5:06     ` Yi Sun
2017-03-28  8:48       ` Jan Beulich
2017-03-28 10:20         ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 14/25] x86: refactor psr: CDP: implement CPU init and free flow Yi Sun
2017-03-27 13:58   ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 15/25] x86: refactor psr: CDP: implement get hw info flow Yi Sun
2017-03-27 14:08   ` Jan Beulich
2017-03-28  5:13     ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 16/25] x86: refactor psr: CDP: implement get value flow Yi Sun
2017-03-16 11:08 ` [PATCH v9 17/25] x86: refactor psr: CDP: implement set value callback functions Yi Sun
2017-03-27 14:17   ` Jan Beulich
2017-03-28  5:14     ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 18/25] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-03-16 11:08 ` [PATCH v9 19/25] x86: L2 CAT: implement get hw info flow Yi Sun
2017-03-27 14:38   ` Jan Beulich
2017-03-28  5:16     ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 20/25] x86: L2 CAT: implement get value flow Yi Sun
2017-03-27 14:39   ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 21/25] x86: L2 CAT: implement set " Yi Sun
2017-03-27 14:40   ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 22/25] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-03-16 11:08 ` [PATCH v9 23/25] tools: L2 CAT: support show cbm " Yi Sun
2017-03-16 11:08 ` [PATCH v9 24/25] tools: L2 CAT: support set " Yi Sun
2017-03-28 14:04   ` Wei Liu
2017-03-29  1:21     ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 25/25] docs: add L2 CAT description in docs Yi Sun
2017-03-16 11:20 ` [PATCH v9 00/25] Enable L2 Cache Allocation Technology & Refactor psr.c Jan Beulich
2017-03-17  1:29   ` Yi Sun
2017-03-17  7:25     ` Jan Beulich

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