From: Yi Sun <yi.y.sun@linux.intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
he.chen@linux.intel.com, andrew.cooper3@citrix.com,
dario.faggioli@citrix.com, ian.jackson@eu.citrix.com,
mengxu@cis.upenn.edu, xen-devel@lists.xenproject.org,
chao.p.peng@linux.intel.com, roger.pau@citrix.com
Subject: Re: [PATCH v9 07/25] x86: refactor psr: L3 CAT: implement get hw info flow.
Date: Mon, 27 Mar 2017 21:19:50 +0800 [thread overview]
Message-ID: <20170327131950.GD17458@yi.y.sun> (raw)
In-Reply-To: <58D926DB02000078001483B9@prv-mh.provo.novell.com>
On 17-03-27 06:51:07, Jan Beulich wrote:
> >>> On 27.03.17 at 14:24, <yi.y.sun@linux.intel.com> wrote:
> > On 17-03-27 03:07:37, Jan Beulich wrote:
> >> >>> On 16.03.17 at 12:07, <yi.y.sun@linux.intel.com> wrote:
> >> > +static enum psr_feat_type psr_cbm_type_to_feat_type(enum cbm_type type)
> >> > +{
> >> > + enum psr_feat_type feat_type;
> >> > +
> >> > + switch ( type )
> >> > + {
> >> > + case PSR_CBM_TYPE_L3:
> >> > + feat_type = PSR_SOCKET_L3_CAT;
> >> > + break;
> >> > + default:
> >> > + feat_type = PSR_SOCKET_UNKNOWN;
> >> > + break;
> >>
> >> Is this actually reachable, if there are no bugs in the code? If not,
> >> you will want to add ASSERT_UNREACHABLE().
> >>
> > If there is no bug, we should not reach here. Will use ASSERT_UNREACHABLE().
> >
> >> > +int psr_get_info(unsigned int socket, enum cbm_type type,
> >> > + uint32_t data[], unsigned int array_len)
> >> > +{
> >> > + const struct psr_socket_info *info = get_socket_info(socket);
> >> > + const struct feat_node *feat;
> >> > + enum psr_feat_type feat_type;
> >> > +
> >> > + if ( IS_ERR(info) )
> >> > + return PTR_ERR(info);
> >> > +
> >> > + if ( !data )
> >> > + return -EINVAL;
> >> > +
> >> > + feat_type = psr_cbm_type_to_feat_type(type);
> >> > + feat = info->features[feat_type];
> >>
> >> You can't blindly use the return value here as array index, as (at
> >> least in theory, see above) the function may return
> >> PSR_SOCKET_UNKNOWN. IOW you need to check against
> >> ARRAY_SIZE(info->features) first.
> >>
> > If I use 'ASSERT_UNREACHABLE()' above, I don't need check against
> > ARRAY_SIZE(info->features) here, right?
>
> That's a slightly difficult call: The assertion will expand to nothing
> in production builds, so to be on the safe side I think you better
> check function return values _everywhere_.
>
Got it, will check feat_type.
> >> > +/* Used by psr_get_info() */
> >> > +#define PSR_INFO_IDX_CBM_LEN 0
> > CAT/CDP specific.
> >
> >> > +#define PSR_INFO_IDX_COS_MAX 1
> > Common so far.
> >
> >> > +#define PSR_INFO_IDX_FLAG 2
> > CAT/CDP specific so far.
> >
> >> > +#define PSR_INFO_CAT_SIZE 3
> > Array size which can be used for all features but may not be appropriate for
> > future features. So I defined it as CAT specific.
> >
> >>
> >> So I need some explanation on the naming here: Are the first three
> >> CAT-independent, but the last one is CAT-dependent? It doesn't
> >> look so (or else it would be odd coincidence for the last one to be
> >> one higher than the biggest of the _IDX ones). And if they're all
> >> in either of the two categories, their names should reflect that
> >> (i.e. either all have _CAT in their names, or none does).
> >>
> > Please check above comments. Maybe below definitions are better?
> > PSR_INFO_IDX_CAT_CBM_LEN
> > PSR_INFO_IDX_COS_MAX
> > PSR_INFO_IDX_CAT_FLAG
> > PSR_INFO_ARRAY_SIZE
>
> But why would the array size be 3 for some feature only having
> COS_MAX (for example)? I think you should
> - put common indexes first
> - have PSR_INFO_CAT_ARRAY_SIZE (or PSR_INFO_NUM_IDX_CAT
> or whatever, but with CAT in it).
>
Per current known features, all of them (CAT/MBA) have three members in
HW info. So, I think we can define ARRAY_SIZE to 3 and define its name to
a common name so far.
BRs,
Sun Yi
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
next prev parent reply other threads:[~2017-03-27 13:19 UTC|newest]
Thread overview: 105+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-16 11:07 [PATCH v9 00/25] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-03-16 11:07 ` [PATCH v9 01/25] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-03-16 11:07 ` [PATCH v9 02/25] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-03-16 11:07 ` [PATCH v9 03/25] x86: refactor psr: implement main data structures Yi Sun
2017-03-24 16:19 ` Jan Beulich
2017-03-27 2:38 ` Yi Sun
2017-03-27 6:20 ` Jan Beulich
2017-03-27 7:12 ` Yi Sun
2017-03-27 7:37 ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 04/25] x86: move cpuid_count_leaf from cpuid.c to processor.h Yi Sun
2017-03-24 16:22 ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 05/25] x86: refactor psr: L3 CAT: implement CPU init and free flow Yi Sun
2017-03-24 16:52 ` Jan Beulich
2017-03-27 4:41 ` Yi Sun
2017-03-27 6:34 ` Jan Beulich
2017-03-27 8:16 ` Yi Sun
2017-03-27 8:43 ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 06/25] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows Yi Sun
2017-03-16 11:07 ` [PATCH v9 07/25] x86: refactor psr: L3 CAT: implement get hw info flow Yi Sun
2017-03-27 9:07 ` Jan Beulich
2017-03-27 12:24 ` Yi Sun
2017-03-27 12:51 ` Jan Beulich
2017-03-27 13:19 ` Yi Sun [this message]
2017-03-27 13:32 ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 08/25] x86: refactor psr: L3 CAT: implement get value flow Yi Sun
2017-03-27 9:23 ` Jan Beulich
2017-03-27 12:59 ` Yi Sun
2017-03-27 13:34 ` Jan Beulich
2017-03-28 2:13 ` Yi Sun
2017-03-28 8:10 ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 09/25] x86: refactor psr: L3 CAT: set value: implement framework Yi Sun
2017-03-27 9:59 ` Jan Beulich
2017-03-28 1:21 ` Yi Sun
2017-03-28 8:21 ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 10/25] x86: refactor psr: L3 CAT: set value: assemble features value array Yi Sun
2017-03-27 10:17 ` Jan Beulich
2017-03-28 3:12 ` Yi Sun
2017-03-28 8:05 ` Yi Sun
2017-03-28 8:36 ` Jan Beulich
2017-03-28 9:11 ` Yi Sun
2017-03-28 9:20 ` Jan Beulich
2017-03-28 10:18 ` Yi Sun
2017-03-28 10:39 ` Jan Beulich
2017-03-28 8:34 ` Jan Beulich
2017-03-28 10:12 ` Yi Sun
2017-03-28 10:36 ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 11/25] x86: refactor psr: L3 CAT: set value: implement cos finding flow Yi Sun
2017-03-27 10:28 ` Jan Beulich
2017-03-28 3:26 ` Yi Sun
2017-03-28 8:41 ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 12/25] x86: refactor psr: L3 CAT: set value: implement cos id picking flow Yi Sun
2017-03-27 10:37 ` Jan Beulich
2017-03-28 4:58 ` Yi Sun
2017-03-28 8:45 ` Jan Beulich
2017-03-28 10:31 ` Yi Sun
2017-03-28 10:40 ` Jan Beulich
2017-03-28 11:59 ` Yi Sun
2017-03-28 12:20 ` Jan Beulich
2017-03-29 1:20 ` Yi Sun
2017-03-29 1:36 ` Yi Sun
2017-03-29 9:57 ` Jan Beulich
2017-03-30 1:37 ` Yi Sun
2017-03-30 1:39 ` Yi Sun
2017-03-30 11:55 ` Jan Beulich
2017-03-30 12:10 ` Yi Sun
2017-03-31 8:47 ` Jan Beulich
2017-03-31 9:12 ` Yi Sun
2017-03-31 9:18 ` Yi Sun
2017-03-31 10:19 ` Jan Beulich
2017-03-31 12:40 ` Yi Sun
2017-03-31 12:51 ` Jan Beulich
2017-03-31 13:22 ` Yi Sun
2017-03-31 14:35 ` Jan Beulich
2017-03-31 14:46 ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 13/25] x86: refactor psr: L3 CAT: set value: implement write msr flow Yi Sun
2017-03-27 10:46 ` Jan Beulich
2017-03-28 5:06 ` Yi Sun
2017-03-28 8:48 ` Jan Beulich
2017-03-28 10:20 ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 14/25] x86: refactor psr: CDP: implement CPU init and free flow Yi Sun
2017-03-27 13:58 ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 15/25] x86: refactor psr: CDP: implement get hw info flow Yi Sun
2017-03-27 14:08 ` Jan Beulich
2017-03-28 5:13 ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 16/25] x86: refactor psr: CDP: implement get value flow Yi Sun
2017-03-16 11:08 ` [PATCH v9 17/25] x86: refactor psr: CDP: implement set value callback functions Yi Sun
2017-03-27 14:17 ` Jan Beulich
2017-03-28 5:14 ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 18/25] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-03-16 11:08 ` [PATCH v9 19/25] x86: L2 CAT: implement get hw info flow Yi Sun
2017-03-27 14:38 ` Jan Beulich
2017-03-28 5:16 ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 20/25] x86: L2 CAT: implement get value flow Yi Sun
2017-03-27 14:39 ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 21/25] x86: L2 CAT: implement set " Yi Sun
2017-03-27 14:40 ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 22/25] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-03-16 11:08 ` [PATCH v9 23/25] tools: L2 CAT: support show cbm " Yi Sun
2017-03-16 11:08 ` [PATCH v9 24/25] tools: L2 CAT: support set " Yi Sun
2017-03-28 14:04 ` Wei Liu
2017-03-29 1:21 ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 25/25] docs: add L2 CAT description in docs Yi Sun
2017-03-16 11:20 ` [PATCH v9 00/25] Enable L2 Cache Allocation Technology & Refactor psr.c Jan Beulich
2017-03-17 1:29 ` Yi Sun
2017-03-17 7:25 ` Jan Beulich
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170327131950.GD17458@yi.y.sun \
--to=yi.y.sun@linux.intel.com \
--cc=JBeulich@suse.com \
--cc=andrew.cooper3@citrix.com \
--cc=chao.p.peng@linux.intel.com \
--cc=dario.faggioli@citrix.com \
--cc=he.chen@linux.intel.com \
--cc=ian.jackson@eu.citrix.com \
--cc=kevin.tian@intel.com \
--cc=mengxu@cis.upenn.edu \
--cc=roger.pau@citrix.com \
--cc=wei.liu2@citrix.com \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).