From: Roger Pau Monne <roger.pau@citrix.com>
To: xen-devel@lists.xenproject.org, konrad.wilk@oracle.com,
boris.ostrovsky@oracle.com
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
Jan Beulich <jbeulich@suse.com>,
Roger Pau Monne <roger.pau@citrix.com>
Subject: [PATCH v3 3/8] x86/irq: rename NR_HVM_IRQS and break it's dependency on VIOAPIC_NUM_PINS
Date: Wed, 29 Mar 2017 15:47:28 +0100 [thread overview]
Message-ID: <20170329144733.4709-2-roger.pau@citrix.com> (raw)
In-Reply-To: <20170329143918.4445-1-roger.pau@citrix.com>
Rename it to NR_HVM_DOMU_IRQS, and get it's value from the size of the DomU vIO
APIC redirection table.
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
---
Changes since v2:
- New in this version.
NB: this patch makes it easier to get rid of VIOAPIC_NUM_PINS in later patches.
---
xen/arch/x86/physdev.c | 6 ++++--
xen/drivers/passthrough/io.c | 2 +-
xen/include/xen/hvm/irq.h | 4 ++--
3 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/xen/arch/x86/physdev.c b/xen/arch/x86/physdev.c
index 6c15f9bf49..eec4a41231 100644
--- a/xen/arch/x86/physdev.c
+++ b/xen/arch/x86/physdev.c
@@ -32,6 +32,8 @@ static int physdev_hvm_map_pirq(
{
int ret = 0;
+ ASSERT(!is_hardware_domain(d));
+
spin_lock(&d->event_lock);
switch ( type )
{
@@ -39,7 +41,7 @@ static int physdev_hvm_map_pirq(
const struct hvm_irq_dpci *hvm_irq_dpci;
unsigned int machine_gsi = 0;
- if ( *index < 0 || *index >= NR_HVM_IRQS )
+ if ( *index < 0 || *index >= NR_HVM_DOMU_IRQS )
{
ret = -EINVAL;
break;
@@ -52,7 +54,7 @@ static int physdev_hvm_map_pirq(
{
const struct hvm_girq_dpci_mapping *girq;
- BUILD_BUG_ON(ARRAY_SIZE(hvm_irq_dpci->girq) < NR_HVM_IRQS);
+ BUILD_BUG_ON(ARRAY_SIZE(hvm_irq_dpci->girq) < NR_HVM_DOMU_IRQS);
list_for_each_entry ( girq,
&hvm_irq_dpci->girq[*index],
list )
diff --git a/xen/drivers/passthrough/io.c b/xen/drivers/passthrough/io.c
index f48eb31420..83e096131e 100644
--- a/xen/drivers/passthrough/io.c
+++ b/xen/drivers/passthrough/io.c
@@ -330,7 +330,7 @@ int pt_irq_create_bind(
spin_unlock(&d->event_lock);
return -ENOMEM;
}
- for ( i = 0; i < NR_HVM_IRQS; i++ )
+ for ( i = 0; i < NR_HVM_DOMU_IRQS; i++ )
INIT_LIST_HEAD(&hvm_irq_dpci->girq[i]);
hvm_domain_irq(d)->dpci = hvm_irq_dpci;
diff --git a/xen/include/xen/hvm/irq.h b/xen/include/xen/hvm/irq.h
index d3f8623c0c..f04125248e 100644
--- a/xen/include/xen/hvm/irq.h
+++ b/xen/include/xen/hvm/irq.h
@@ -76,13 +76,13 @@ struct hvm_girq_dpci_mapping {
#define NR_ISAIRQS 16
#define NR_LINK 4
#if defined(CONFIG_X86)
-# define NR_HVM_IRQS VIOAPIC_NUM_PINS
+# define NR_HVM_DOMU_IRQS ARRAY_SIZE(((struct hvm_hw_vioapic *)0)->redirtbl)
#endif
/* Protected by domain's event_lock */
struct hvm_irq_dpci {
/* Guest IRQ to guest device/intx mapping. */
- struct list_head girq[NR_HVM_IRQS];
+ struct list_head girq[NR_HVM_DOMU_IRQS];
/* Record of mapped ISA IRQs */
DECLARE_BITMAP(isairq_map, NR_ISAIRQS);
/* Record of mapped Links */
--
2.11.0 (Apple Git-81)
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next prev parent reply other threads:[~2017-03-29 14:48 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-29 14:39 [PATCH v3 0/8] x86/vioapic: introduce support for multiple vIO APICs Roger Pau Monne
2017-03-29 14:39 ` [PATCH v3 1/8] x86/vioapic: expand hvm_vioapic to contain vIO APIC internal state Roger Pau Monne
2017-03-31 14:52 ` Jan Beulich
2017-03-29 14:47 ` [PATCH v3 2/8] x86/hvm: introduce hvm_domain_irq macro Roger Pau Monne
2017-03-31 5:10 ` Tian, Kevin
2017-03-31 14:53 ` Jan Beulich
2017-03-29 14:47 ` Roger Pau Monne [this message]
2017-03-31 15:01 ` [PATCH v3 3/8] x86/irq: rename NR_HVM_IRQS and break it's dependency on VIOAPIC_NUM_PINS Jan Beulich
2017-04-04 10:15 ` Roger Pau Monne
2017-04-04 10:18 ` Jan Beulich
2017-03-29 14:47 ` [PATCH v3 4/8] x86/hvm: convert gsi_assert_count into a variable size array Roger Pau Monne
2017-03-31 15:16 ` Jan Beulich
2017-04-03 16:18 ` Roger Pau Monne
2017-03-29 14:47 ` [PATCH v3 5/8] x86/vioapic: allow the vIO APIC to have a variable number of pins Roger Pau Monne
2017-03-31 15:20 ` Jan Beulich
2017-03-29 14:47 ` [PATCH v3 6/8] x86/vioapic: introduce support for multiple vIO APICS Roger Pau Monne
2017-03-31 15:48 ` Jan Beulich
2017-03-29 14:47 ` [PATCH v3 7/8] x86/ioapic: add prototype for io_apic_gsi_base to io_apic.h Roger Pau Monne
2017-03-29 14:47 ` [PATCH v3 8/8] x86/vioapic: allow PVHv2 Dom0 to have more than one IO APIC Roger Pau Monne
2017-03-30 8:16 ` [PATCH v3 0/8] x86/vioapic: introduce support for multiple vIO APICs Roger Pau Monne
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