From: Chao Gao <chao.gao@intel.com>
To: Jan Beulich <JBeulich@suse.com>,
Andrew Cooper <andrew.cooper3@citrix.com>
Cc: xen-devel@lists.xen.org
Subject: Re: [PATCH v2] x86/vlapic: Don't reset APIC ID when handling INIT signal
Date: Thu, 20 Apr 2017 03:33:31 +0800 [thread overview]
Message-ID: <20170419193331.GA84061@skl-2s3.sh.intel.com> (raw)
In-Reply-To: <20170419074141.GA100130@skl-2s3.sh.intel.com>
On Wed, Apr 19, 2017 at 03:41:41PM +0800, Chao Gao wrote:
>>> - vlapic->hw.apic_base_msr = (MSR_IA32_APICBASE_ENABLE |
>>> - APIC_DEFAULT_PHYS_BASE);
>>> + vlapic->hw.apic_base_msr |= APIC_DEFAULT_PHYS_BASE;
>>
>>Perhaps better move this ahead of the call to vlapic_reset() then
>>too.
>>
>>Remains the question (not answered by the SDM afaics): What
>>happens to the base address during reset?
>
>Actually, I don't know and that's also why I don't touch apic_base_msr in the
>first verson. Will try to get a confirmation from hardware guys.
According to the description about APIC base address in
"ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC) ->
"LOCAL APIC" -> "Local APIC Status and Location", the APIC base
address is set to 0xFEE00000H as a result of reset or power-up.
Thanks
Chao
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next prev parent reply other threads:[~2017-04-19 19:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-19 6:40 [PATCH v2] x86/vlapic: Don't reset APIC ID when handling INIT signal Chao Gao
2017-04-19 14:17 ` Jan Beulich
2017-04-19 7:41 ` Chao Gao
2017-04-19 15:04 ` Jan Beulich
2017-04-19 19:33 ` Chao Gao [this message]
2017-04-20 9:55 ` Jan Beulich
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