From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mohit Gambhir Subject: [PATCH v2] x86/vpmu_intel: Fix hypervisor crash by masking PC bit in MSR_P6_EVNTSEL Date: Wed, 26 Apr 2017 14:11:04 -0400 Message-ID: <20170426181104.10112-1-mohit.gambhir@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: jun.nakajima@intel.com, kevin.tian@intel.com, xen-devel@lists.xen.org Cc: boris.ostrovsky@oracle.com, Mohit Gambhir , JBeulich@suse.com List-Id: xen-devel@lists.xenproject.org U2V0dGluZyBQaW4gQ29udHJvbCAoUEMpIGJpdCAoMTkpIGluIE1TUl9QNl9FVk5UU0VMIHJlc3Vs dHMgaW4gYSBHZW5lcmFsClByb3RlY3Rpb24gRmF1bHQgYW5kIHRodXMgcmVzdWx0cyBpbiBhIGh5 cGVydmlzb3IgY3Jhc2guIFRoaXMgcGF0Y2ggZml4ZXMgdGhlCmNyYXNoIGJ5IG1hc2tpbmcgUEMg Yml0IGFuZCByZXR1cm5pbmcgYW4gZXJyb3IgaW4gY2FzZSBhbnkgZ3Vlc3QgdHJpZXMgdG8gd3Jp dGUKdG8gaXQuCgpTaWduZWQtb2ZmLWJ5OiBNb2hpdCBHYW1iaGlyIDxtb2hpdC5nYW1iaGlyQG9y YWNsZS5jb20+Ci0tLQp2MiBvZiB0aGlzIHBhdGNoIHRha2VzIGEgZGlmZmVyZW50IGFwcHJvYWNo IHRvIGZpeGluZyB0aGUgaHlwZXJ2aXNvciBjcmFzaC4KQXMgc3RhdGVkIGluIHRoZSBjb21taXQg bWVzc2FnZSB2MiBtYXNrcyBQQyBmbGFnIGNvbnRyb2wgYml0IHVubGlrZSB2MSB0aGF0IAp1c2Vk IHdybXNyX3NhZmUgd2hpbGUgd3JpdGluZyB0byB0aGUgTVNSLiB2MSBwb3NlZCBhIGNvbXBsaWNh dGlvbiBpbiByZXR1cm5pbmcKdGhlIGVycm9yIHRvIHRoZSBIVk0gZ3Vlc3RzLgoKV2l0aCB0aGlz IGFwcHJvYWNoIHRoZSB3cml0ZXMgdG8gUEMgYml0cyBhcmUgcHJvdGVjdGVkIGZvciBib3RoIG5h dGl2ZSBNU1IgCndyaXRlcyBhbmQgVk1YIGRhdGEgc3RydWN0dXJlIHdyaXRlcyAoZm9yIEhWTSBn dWVzdHMpCi0tLQogeGVuL2FyY2gveDg2L2NwdS92cG11X2ludGVsLmMgfCAzICsrLQogMSBmaWxl IGNoYW5nZWQsIDIgaW5zZXJ0aW9ucygrKSwgMSBkZWxldGlvbigtKQoKZGlmZiAtLWdpdCBhL3hl bi9hcmNoL3g4Ni9jcHUvdnBtdV9pbnRlbC5jIGIveGVuL2FyY2gveDg2L2NwdS92cG11X2ludGVs LmMKaW5kZXggM2YwMzIyYy4uNmQ3NjhjYiAxMDA2NDQKLS0tIGEveGVuL2FyY2gveDg2L2NwdS92 cG11X2ludGVsLmMKKysrIGIveGVuL2FyY2gveDg2L2NwdS92cG11X2ludGVsLmMKQEAgLTc2LDEy ICs3NiwxMyBAQCBzdGF0aWMgYm9vbF90IF9fcmVhZF9tb3N0bHkgZnVsbF93aWR0aF93cml0ZTsK ICNkZWZpbmUgRklYRURfQ1RSX0NUUkxfQU5ZVEhSRUFEX01BU0sgMHg0CiAKICNkZWZpbmUgQVJD SF9DTlRSX0VOQUJMRUQgICAoMVVMTCA8PCAyMikKKyNkZWZpbmUgQVJDSF9DTlRSX1BJTl9DT05U Uk9MICgxVUxMIDw8IDE5KQogCiAvKiBOdW1iZXIgb2YgZ2VuZXJhbC1wdXJwb3NlIGFuZCBmaXhl ZCBwZXJmb3JtYW5jZSBjb3VudGVycyAqLwogc3RhdGljIHVuc2lnbmVkIGludCBfX3JlYWRfbW9z dGx5IGFyY2hfcG1jX2NudCwgZml4ZWRfcG1jX2NudDsKIAogLyogTWFza3MgdXNlZCBmb3IgdGVz dGluZyB3aGV0aGVyIGFuZCBNU1IgaXMgdmFsaWQgKi8KLSNkZWZpbmUgQVJDSF9DVFJMX01BU0sg ICh+KCgxdWxsIDw8IDMyKSAtIDEpIHwgKDF1bGwgPDwgMjEpKQorI2RlZmluZSBBUkNIX0NUUkxf TUFTSyAgKH4oKDF1bGwgPDwgMzIpIC0gMSkgfCAoMXVsbCA8PCAyMSkgfCBBUkNIX0NOVFJfUElO X0NPTlRST0wpCiBzdGF0aWMgdWludDY0X3QgX19yZWFkX21vc3RseSBmaXhlZF9jdHJsX21hc2ss IGZpeGVkX2NvdW50ZXJzX21hc2s7CiBzdGF0aWMgdWludDY0X3QgX19yZWFkX21vc3RseSBnbG9i YWxfb3ZmX2N0cmxfbWFzaywgZ2xvYmFsX2N0cmxfbWFzazsKIAotLSAKMi45LjMKCgpfX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpYZW4tZGV2ZWwgbWFpbGlu ZyBsaXN0Clhlbi1kZXZlbEBsaXN0cy54ZW4ub3JnCmh0dHBzOi8vbGlzdHMueGVuLm9yZy94ZW4t ZGV2ZWwK