From: Yi Sun <yi.y.sun@linux.intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
he.chen@linux.intel.com, andrew.cooper3@citrix.com,
dario.faggioli@citrix.com, ian.jackson@eu.citrix.com,
mengxu@cis.upenn.edu, xen-devel@lists.xenproject.org,
chao.p.peng@linux.intel.com, roger.pau@citrix.com
Subject: Re: [PATCH v12 15/23] x86: refactor psr: CDP: implement set value callback function.
Date: Mon, 3 Jul 2017 20:52:40 +0800 [thread overview]
Message-ID: <20170703125240.GP3420@yi.y.sun> (raw)
In-Reply-To: <595A27ED0200007800167C6D@prv-mh.provo.novell.com>
On 17-07-03 03:18:05, Jan Beulich wrote:
> >>> On 03.07.17 at 10:40, <yi.y.sun@linux.intel.com> wrote:
> > On 17-07-03 01:01:09, Jan Beulich wrote:
> >> >>> On 03.07.17 at 08:33, <yi.y.sun@linux.intel.com> wrote:
> >> > On 17-06-30 06:02:32, Jan Beulich wrote:
> >> >> >>> Yi Sun <yi.y.sun@linux.intel.com> 06/30/17 1:30 PM >>>
> >
> > To decide the return value, we have to know if input 'type' is correct or
> > not.
> > There are two ways:
> > 1. Check if input 'type' without iteration, like the above codes. Becaue you
> > don't agree the ordering assumptions, this way is not good.
> > 2. Use iteration, like the original codes. Record if the statement is hit.
> > If yes, return 0. Otherwise, return -EINVAL. The original codes are below:
> > for ( i = 0; i < props->cos_num; i++ )
> > {
> > if ( type == props->type[i] || type == props->alt_type )
> > {
> > val[i] = new_val;
> > ret = 0;
> > }
> > }
> >
> > I think the main issue you don't like in the original codes is that
> > the 'ret = 0' may happen for several times. How about below change?
> > for ( i = 0; i < props->cos_num; i++ )
> > {
> > if ( type == props->type[i] || type == props->alt_type )
> > {
> > val[i] = new_val;
> > if ( ret )
> > ret = 0;
> > }
> > }
>
> No, the multiple assignments would be no issue at all. As said
> before, what I dislike is the wrongness of the return value if
> the first iteration sets ret to zero, but a subsequent one
> wouldn't. In that case, an error should be signaled.
>
Ok. Then, how about below change? Thanks!
int ret = 0;
for ( i = 0; i < props->cos_num; i++ )
{
if ( type == props->type[i] )
{
val[i] = new_val;
ret = 0;
break;
}
else if ( type == props->alt_type )
val[i] = new_val;
else
ret = -EINVAL;
}
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next prev parent reply other threads:[~2017-07-03 12:53 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-14 1:12 [PATCH v12 00/23] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-06-14 1:12 ` [PATCH v12 01/23] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-06-14 1:12 ` [PATCH v12 02/23] x86: move cpuid_count_leaf from cpuid.c to processor.h Yi Sun
2017-06-14 1:12 ` [PATCH v12 03/23] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-06-14 1:12 ` [PATCH v12 04/23] x86: refactor psr: L3 CAT: implement main data structures, CPU init and free flows Yi Sun
2017-06-28 7:12 ` Jan Beulich
2017-06-28 9:07 ` Yi Sun
2017-06-14 1:12 ` [PATCH v12 05/23] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows Yi Sun
2017-06-28 7:13 ` Jan Beulich
2017-06-14 1:12 ` [PATCH v12 06/23] x86: refactor psr: L3 CAT: implement get hw info flow Yi Sun
2017-06-14 1:12 ` [PATCH v12 07/23] x86: refactor psr: L3 CAT: implement get value flow Yi Sun
2017-06-28 7:14 ` Jan Beulich
2017-06-14 1:12 ` [PATCH v12 08/23] x86: refactor psr: L3 CAT: set value: implement framework Yi Sun
2017-06-28 7:14 ` Jan Beulich
2017-06-28 9:09 ` Yi Sun
2017-06-28 11:43 ` Jan Beulich
2017-06-29 5:12 ` Yi Sun
2017-06-29 6:24 ` Jan Beulich
2017-06-29 7:21 ` Yi Sun
2017-06-14 1:12 ` [PATCH v12 09/23] x86: refactor psr: L3 CAT: set value: assemble features value array Yi Sun
2017-06-29 17:56 ` Jan Beulich
2017-06-14 1:12 ` [PATCH v12 10/23] x86: refactor psr: L3 CAT: set value: implement cos finding flow Yi Sun
2017-06-29 17:57 ` Jan Beulich
2017-06-14 1:12 ` [PATCH v12 11/23] x86: refactor psr: L3 CAT: set value: implement cos id picking flow Yi Sun
2017-06-29 17:59 ` Jan Beulich
2017-06-14 1:12 ` [PATCH v12 12/23] x86: refactor psr: L3 CAT: set value: implement write msr flow Yi Sun
2017-06-29 18:00 ` Jan Beulich
2017-06-30 5:45 ` Yi Sun
2017-06-30 6:45 ` Jan Beulich
2017-06-30 7:08 ` Yi Sun
2017-06-14 1:12 ` [PATCH v12 13/23] x86: refactor psr: CDP: implement CPU init flow Yi Sun
2017-06-30 6:40 ` Jan Beulich
2017-06-30 6:59 ` Yi Sun
2017-06-30 7:33 ` Jan Beulich
2017-06-30 8:04 ` Yi Sun
2017-06-30 9:18 ` Jan Beulich
2017-07-04 1:40 ` Yi Sun
2017-07-04 7:28 ` Jan Beulich
2017-07-05 1:45 ` Yi Sun
2017-06-14 1:12 ` [PATCH v12 14/23] x86: refactor psr: CDP: implement get hw info flow Yi Sun
2017-06-30 6:41 ` Jan Beulich
2017-06-14 1:12 ` [PATCH v12 15/23] x86: refactor psr: CDP: implement set value callback function Yi Sun
2017-06-30 6:42 ` Jan Beulich
2017-06-30 7:22 ` Yi Sun
2017-06-30 8:54 ` Yi Sun
2017-06-30 9:33 ` Jan Beulich
2017-06-30 11:29 ` Yi Sun
2017-06-30 12:02 ` Jan Beulich
2017-07-03 6:33 ` Yi Sun
2017-07-03 7:01 ` Jan Beulich
2017-07-03 8:40 ` Yi Sun
2017-07-03 9:18 ` Jan Beulich
2017-07-03 12:52 ` Yi Sun [this message]
2017-07-03 13:02 ` Jan Beulich
2017-06-14 1:12 ` [PATCH v12 16/23] x86: L2 CAT: implement CPU init flow Yi Sun
2017-06-30 6:58 ` Jan Beulich
2017-06-30 7:27 ` Yi Sun
2017-06-30 7:36 ` Jan Beulich
2017-06-30 8:05 ` Yi Sun
2017-06-14 1:12 ` [PATCH v12 17/23] x86: L2 CAT: implement get hw info flow Yi Sun
2017-06-30 6:59 ` Jan Beulich
2017-06-14 1:12 ` [PATCH v12 18/23] x86: L2 CAT: implement get value flow Yi Sun
2017-06-14 1:12 ` [PATCH v12 19/23] x86: L2 CAT: implement set " Yi Sun
2017-06-14 1:12 ` [PATCH v12 20/23] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-06-14 1:12 ` [PATCH v12 21/23] tools: L2 CAT: support show cbm " Yi Sun
2017-06-14 1:12 ` [PATCH v12 22/23] tools: L2 CAT: support set " Yi Sun
2017-06-14 1:12 ` [PATCH v12 23/23] docs: add L2 CAT description in docs Yi Sun
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