From: Wei Liu <wei.liu2@citrix.com>
To: Yi Sun <yi.y.sun@linux.intel.com>
Cc: kevin.tian@intel.com, Wei Liu <wei.liu2@citrix.com>,
andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
ian.jackson@eu.citrix.com, mengxu@cis.upenn.edu,
jbeulich@suse.com, chao.p.peng@linux.intel.com,
xen-devel@lists.xenproject.org, roger.pau@citrix.com
Subject: Re: [PATCH v15 01/23] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document
Date: Fri, 4 Aug 2017 12:56:15 +0100 [thread overview]
Message-ID: <20170804115615.4baarily6jzorivl@citrix.com> (raw)
In-Reply-To: <20170804044025.GK11396@yi.y.sun>
On Fri, Aug 04, 2017 at 12:40:25PM +0800, Yi Sun wrote:
> On 17-08-03 13:26:37, Wei Liu wrote:
> > On Tue, Aug 01, 2017 at 04:48:32PM +0800, Yi Sun wrote:
> > > This patch creates CAT and CDP feature document in doc/features/. It describes
> > > key points to implement L3 CAT/CDP and L2 CAT which is described in details in
> > > Intel SDM "INTEL? RESOURCE DIRECTOR TECHNOLOGY (INTEL? RDT) ALLOCATION FEATURES".
> > >
> > > Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
> > > Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> > > Reviewed-by: Wei Liu <wei.liu2@citrix.com>
> >
> > https://travis-ci.org/xen-project/xen/jobs/260567408
> >
> > pandoc: Cannot decode byte '\xae': Data.Text.Encoding.Fusion.streamUtf8: Invalid UTF-8 stream
> >
> > Please submit a patch to fix it.
>
> I am afraid this is caused by the special charactor '®' (ASCII: xAE) as below:
> "INTEL® RESOURCE DIRECTOR TECHNOLOGY (INTEL® RDT) ALLOCATION FEATURES" [Intel® 64 and IA-32 Architectures Software Developer Manuals, vol3](http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html)
>
> I have removed it from the doc and created a patch. But before send the patch
> out, how can I have a test to check if my assumption is correct?
>
> I have executed 'make dist' and did not see any issue. But I met below error
> when I tried './scripts/travis-build' after the full build.
That script is not supposed to run by you directly. The error is
irrelevant to your changes.
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next prev parent reply other threads:[~2017-08-04 11:56 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-01 8:48 [PATCH v15 00/23] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-08-01 8:48 ` [PATCH v15 01/23] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-08-03 12:26 ` Wei Liu
2017-08-04 4:40 ` Yi Sun
2017-08-04 11:56 ` Wei Liu [this message]
2017-08-01 8:48 ` [PATCH v15 02/23] x86: move cpuid_count_leaf from cpuid.c to processor.h Yi Sun
2017-08-01 8:48 ` [PATCH v15 03/23] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-08-01 8:48 ` [PATCH v15 04/23] x86: refactor psr: L3 CAT: implement main data structures, CPU init and free flows Yi Sun
2017-08-01 8:48 ` [PATCH v15 05/23] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows Yi Sun
2017-08-01 8:48 ` [PATCH v15 06/23] x86: refactor psr: L3 CAT: implement get hw info flow Yi Sun
2017-08-01 8:48 ` [PATCH v15 07/23] x86: refactor psr: L3 CAT: implement get value flow Yi Sun
2017-08-01 8:48 ` [PATCH v15 08/23] x86: refactor psr: L3 CAT: set value: implement framework Yi Sun
2017-08-04 3:10 ` [PATCH v15.2 " Yi Sun
2017-08-01 8:48 ` [PATCH v15 09/23] x86: refactor psr: L3 CAT: set value: assemble features value array Yi Sun
2017-08-01 8:48 ` [PATCH v15 10/23] x86: refactor psr: L3 CAT: set value: implement cos finding flow Yi Sun
2017-08-01 8:48 ` [PATCH v15 11/23] x86: refactor psr: L3 CAT: set value: implement cos id picking flow Yi Sun
2017-08-01 8:48 ` [PATCH v15 12/23] x86: refactor psr: L3 CAT: set value: implement write msr flow Yi Sun
2017-08-01 8:48 ` [PATCH v15 13/23] x86: refactor psr: CDP: implement CPU init flow Yi Sun
2017-08-01 9:20 ` Wei Liu
2017-08-02 12:35 ` Jan Beulich
2017-08-02 15:11 ` Yi Sun
2017-08-02 15:19 ` Jan Beulich
2017-08-03 2:10 ` [PATCH v15.1 " Yi Sun
2017-08-03 9:37 ` Jan Beulich
2017-08-04 3:23 ` Yi Sun
2017-08-04 5:42 ` Jan Beulich
2017-08-04 7:42 ` Yi Sun
2017-08-04 3:08 ` [PATCH v15.2 " Yi Sun
2017-08-01 8:48 ` [PATCH v15 14/23] x86: refactor psr: CDP: implement get hw info flow Yi Sun
2017-08-01 8:48 ` [PATCH v15 15/23] x86: refactor psr: CDP: implement set value callback function Yi Sun
2017-08-01 8:48 ` [PATCH v15 16/23] x86: L2 CAT: implement CPU init flow Yi Sun
2017-08-01 8:48 ` [PATCH v15 17/23] x86: L2 CAT: implement get hw info flow Yi Sun
2017-08-01 8:48 ` [PATCH v15 18/23] x86: L2 CAT: implement get value flow Yi Sun
2017-08-01 8:48 ` [PATCH v15 19/23] x86: L2 CAT: implement set " Yi Sun
2017-08-01 8:48 ` [PATCH v15 20/23] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-08-01 8:48 ` [PATCH v15 21/23] tools: L2 CAT: support show cbm " Yi Sun
2017-08-01 8:48 ` [PATCH v15 22/23] tools: L2 CAT: support set " Yi Sun
2017-08-01 8:48 ` [PATCH v15 23/23] docs: add L2 CAT description in docs Yi Sun
2017-08-03 15:37 ` [PATCH v15 00/23] Enable L2 Cache Allocation Technology & Refactor psr.c Andrew Cooper
2017-08-03 22:50 ` Boris Ostrovsky
2017-08-04 2:21 ` Yi Sun
2017-08-04 4:36 ` Yi Sun
2017-08-04 13:58 ` Yi Sun
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