From: Chao Gao <chao.gao@intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
Kevin Tian <kevin.tian@intel.com>,
Jun Nakajima <jun.nakajima@intel.com>,
xen-devel@lists.xen.org
Subject: Re: [PATCH v5 1/4] VT-d PI: track the number of vcpus on pi blocking list
Date: Fri, 1 Sep 2017 15:55:08 +0800 [thread overview]
Message-ID: <20170901075506.GA19389@op-computing> (raw)
In-Reply-To: <59A93548020000780017660E@prv-mh.provo.novell.com>
On Fri, Sep 01, 2017 at 02:24:08AM -0600, Jan Beulich wrote:
>>>> On 01.09.17 at 03:39, <chao.gao@intel.com> wrote:
>> After thinking it again, I want to define the counter as
>> a unsigned int variable for the following reasion:
>> 1. It is definite that the counter is closely related with
>> list_add() and list_del(). If the list is protected by the
>> lock, it is straightforward that the counter is also protected
>> by the lock.
>> 2. In patch 3, althought there are some lock-less readers, we
>> will check the counter still meets our requirement with the lock
>> held. Thus, I don't think there is a racing issue.
>
>I think that's fine, but then you still don't need LOCKed accesses
>to the counter for updating it; write_atomic() will suffice afaict.
A stupid question.
Is it contradictory that you think the counter can be protected by
the lock while suggesting using write_atomic() instead of LOCKed
accesses?
updating the counter is always accompanied by updating list and updating
list should in locked region. I meaned things like:
spin_lock()
list_add()
counter++
spin_unlock()
However, I am afraid that not using LOCKed accesses but using
write_atomic() means something like (separating updating the counter
from updating the list I think is not good):
spin_lock()
list_add()
spin_unlock()
write_atomic()
And I think this version is:
spin_lock()
list_add()
add_sized()
spin_unlock()
Thanks
Chao
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next prev parent reply other threads:[~2017-09-01 7:55 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-16 5:14 [PATCH v5 0/4] mitigate the per-pCPU blocking list may be too long Chao Gao
2017-08-16 5:14 ` [PATCH v5 1/4] VT-d PI: track the number of vcpus on pi blocking list Chao Gao
2017-08-30 16:00 ` Jan Beulich
2017-08-30 22:57 ` Chao Gao
2017-08-31 7:42 ` Jan Beulich
2017-08-31 7:15 ` Chao Gao
2017-08-31 8:33 ` Jan Beulich
2017-08-31 7:53 ` Chao Gao
2017-09-01 1:39 ` Chao Gao
2017-09-01 8:24 ` Jan Beulich
2017-09-01 7:55 ` Chao Gao [this message]
2017-09-01 9:13 ` Jan Beulich
2017-09-01 8:37 ` Chao Gao
2017-09-01 9:55 ` Jan Beulich
2017-09-01 10:04 ` Jan Beulich
2017-08-16 5:14 ` [PATCH v5 2/4] x86/vcpu: track hvm vcpu number on the system Chao Gao
2017-08-16 5:14 ` [PATCH v5 3/4] VT-d PI: restrict the number of vcpus in a given pcpu's PI blocking list Chao Gao
2017-08-31 16:01 ` Jan Beulich
2017-08-16 5:14 ` [PATCH v5 4/4] xentrace: add support for HVM's PI blocking list operation Chao Gao
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