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From: Yi Sun <yi.y.sun@linux.intel.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org,
	wei.liu2@citrix.com, chao.p.peng@linux.intel.com,
	roger.pau@citrix.com
Subject: Re: [PATCH v4 04/15] x86: implement data structure and CPU init flow for MBA
Date: Thu, 5 Oct 2017 12:42:47 +0800	[thread overview]
Message-ID: <20171005044247.GG11006@yi.y.sun> (raw)
In-Reply-To: <59D47709020000780010793D@prv-mh.provo.novell.com>

On 17-10-03 23:52:09, Jan Beulich wrote:
> >>> Yi Sun <yi.y.sun@linux.intel.com> 09/29/17 3:55 AM >>>
> >On 17-09-28 05:00:09, Jan Beulich wrote:
> >> >>> On 23.09.17 at 11:48, <yi.y.sun@linux.intel.com> wrote:
> >> > One thrtl register of MBA stores a throttle value for one or more
> >> > domains. The throttle value means the delay between L2 cache and next
> >> > cache level.
> >> 
> >> What is a delay between two cache levels?
> >> 
> >There is a "programmable rate controller" between them to indirectly control
> >the bandwidth.
> 
> I'm afraid I don't feel like this answers my question. Anyway - the sentence
> needs some re-phrasing so it becomes clear what you're talking about.
> 
I may draw the figure shown in SDM to make things clear.

> >> > @@ -1410,6 +1496,7 @@ static void psr_cpu_init(void)
> >> >      unsigned int socket, cpu = smp_processor_id();
> >> >      struct feat_node *feat;
> >> >      struct cpuid_leaf regs;
> >> > +    uint32_t ebx;
> >> 
> >> Is this local variable really a big help? To me it looks like it only
> >> makes the patch larger without actually improving anything,
> >> and without being related to the subject of the patch.
> >> 
> >IMHO, it can avoid the 'cpuid_count_leaf()' being repeatedly called. Without it,
> >we have to call 'cpuid_count_leaf()' for 2 more times.
> 
> Hmm, didn't you simply replace regs.b uses with ebx? Or did I overlook a place
> where regs is being overwritten before the last of these regs.b uses (in which case
> I think your change is fine)?
> 
The regs is overwritten when a feature presents. The old codes are below

    cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 0, &regs);
    if ( regs.b & PSR_RESOURCE_TYPE_L3 )
    {
        cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 1, &regs); //It is overwritten here.
......
    }

    cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 0, &regs);  //So, we have to call cpuid to get regs again.
    if ( regs.b & PSR_RESOURCE_TYPE_L2 )
    {
        cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 2, &regs);
......

Because above reason, I defined this ebx local variable to avoid calling cpuid
again for next feature.

> Jan

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  reply	other threads:[~2017-10-05  4:44 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-23  9:48 [PATCH v4 00/15] Enable Memory Bandwidth Allocation in Xen Yi Sun
2017-09-23  9:48 ` [PATCH v4 01/15] docs: create Memory Bandwidth Allocation (MBA) feature document Yi Sun
2017-09-25 15:13   ` Roger Pau Monné
2017-09-23  9:48 ` [PATCH v4 02/15] Rename PSR sysctl/domctl interfaces and xsm policy to make them be general Yi Sun
2017-09-25 16:15   ` Roger Pau Monné
2017-09-26  5:15     ` Yi Sun
2017-09-26 14:19   ` Wei Liu
2017-09-28  2:12     ` Yi Sun
2017-09-28  8:34       ` Wei Liu
2017-09-28 10:21   ` Jan Beulich
2017-09-29  1:34     ` Yi Sun
2017-10-04  5:47       ` Jan Beulich
2017-09-23  9:48 ` [PATCH v4 03/15] x86: rename 'cbm_type' to 'psr_type' to make it general Yi Sun
2017-09-28 10:25   ` Jan Beulich
2017-09-29  1:35     ` Yi Sun
2017-09-23  9:48 ` [PATCH v4 04/15] x86: implement data structure and CPU init flow for MBA Yi Sun
2017-09-26  8:38   ` Roger Pau Monné
2017-09-28 10:27     ` Jan Beulich
2017-09-28 11:00   ` Jan Beulich
2017-09-29  1:53     ` Yi Sun
2017-10-04  5:52       ` Jan Beulich
2017-10-05  4:42         ` Yi Sun [this message]
2017-10-05  8:49           ` Jan Beulich
2017-10-05 10:08             ` Yi Sun
2017-09-23  9:48 ` [PATCH v4 05/15] x86: implement get hw info " Yi Sun
2017-09-26  8:46   ` Roger Pau Monné
2017-09-26 11:49     ` Jan Beulich
2017-09-23  9:48 ` [PATCH v4 06/15] x86: implement get value interface " Yi Sun
2017-09-28 11:12   ` Jan Beulich
2017-09-23  9:48 ` [PATCH v4 07/15] x86: implement set value flow " Yi Sun
2017-09-26  9:39   ` Roger Pau Monné
2017-09-28  2:39     ` Yi Sun
2017-09-28 11:15       ` Jan Beulich
2017-09-28 11:36   ` Jan Beulich
2017-09-29  2:56     ` Yi Sun
2017-10-04  5:59       ` Jan Beulich
2017-10-05  4:48         ` Yi Sun
2017-10-05  8:39           ` Roger Pau Monné
2017-10-05  9:39             ` Jan Beulich
2017-10-05 10:10               ` Yi Sun
2017-10-05  8:55           ` Jan Beulich
2017-10-05 10:32             ` Yi Sun
2017-09-23  9:48 ` [PATCH v4 08/15] tools: create general interfaces to support psr allocation features Yi Sun
2017-09-26 10:11   ` Roger Pau Monné
2017-09-23  9:48 ` [PATCH v4 09/15] tools: implement the new libxc get hw info interface Yi Sun
2017-09-26 10:22   ` Roger Pau Monné
2017-09-23  9:48 ` [PATCH v4 10/15] tools: implement the new libxl " Yi Sun
2017-09-26 10:54   ` Roger Pau Monné
2017-09-23  9:48 ` [PATCH v4 11/15] tools: implement the new xl " Yi Sun
2017-09-26 11:19   ` Roger Pau Monné
2017-09-23  9:48 ` [PATCH v4 12/15] tools: rename 'xc_psr_cat_type' to 'xc_psr_type' Yi Sun
2017-09-26 11:21   ` Roger Pau Monné
2017-09-23  9:48 ` [PATCH v4 13/15] tools: implement new generic get value interface and MBA get value command Yi Sun
2017-09-26 11:34   ` Roger Pau Monné
2017-09-23  9:48 ` [PATCH v4 14/15] tools: implement new generic set value interface and MBA set " Yi Sun
2017-09-26 11:39   ` Roger Pau Monné
2017-09-28  2:46     ` Yi Sun
2017-09-23  9:48 ` [PATCH v4 15/15] docs: add MBA description in docs Yi Sun
2017-09-26 11:45   ` Roger Pau Monné
2017-09-26 11:48 ` [PATCH v4 00/15] Enable Memory Bandwidth Allocation in Xen Roger Pau Monné
2017-09-28  2:20   ` Yi Sun
2017-09-28 15:57 ` Wei Liu
2017-09-29  2:58   ` Yi Sun
2017-09-29  8:02     ` Wei Liu

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