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From: Roger Pau Monne <roger.pau@citrix.com>
To: xen-devel@lists.xenproject.org
Cc: boris.ostrovsky@oracle.com,
	Roger Pau Monne <roger.pau@citrix.com>,
	Jan Beulich <jbeulich@suse.com>,
	konrad.wilk@oracle.com
Subject: [PATCH v7 for-next 06/12] pci: split code to size BARs from pci_add_device
Date: Wed, 18 Oct 2017 12:40:28 +0100	[thread overview]
Message-ID: <20171018114034.36587-7-roger.pau@citrix.com> (raw)
In-Reply-To: <20171018114034.36587-1-roger.pau@citrix.com>

So that it can be called from outside in order to get the size of regular PCI
BARs. This will be required in order to map the BARs from PCI devices into PVH
Dom0 p2m.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
Cc: Jan Beulich <jbeulich@suse.com>
---
Changes since v6:
 - Remove the vf and addr local variables.
 - Change the way flags are declared.
 - Move the last bool parameter to the flags field.

Changes since v5:
 - Introduce a flags field for pci_size_mem_bar.
 - Use pci_sbdf_t.

Changes since v4:
 - Restore printing whether the BAR is from a vf.
 - Make the psize pointer parameter not optional.
 - s/u64/uint64_t.
 - Remove some unneeded parentheses.
 - Assert the return value is never 0.
 - Use the newly introduced pci_sbdf_t type.

Changes since v3:
 - Rename function to size BARs to pci_size_mem_bar.
 - Change the parameters passed to the function. Pass the position and
   whether the BAR is the last one, instead of the (base, max_bars,
   *index) tuple.
 - Make the function return the number of BARs consumed (1 for 32b, 2
   for 64b BARs).
 - Change the dprintk back to printk.
 - Do not log another error message in pci_add_device in case
   pci_size_mem_bar fails.
---
 xen/drivers/passthrough/pci.c | 98 ++++++++++++++++++++++++++++---------------
 xen/include/xen/pci.h         |  4 ++
 2 files changed, 68 insertions(+), 34 deletions(-)

diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index 519993d536..b3afc45331 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -603,6 +603,54 @@ static int iommu_add_device(struct pci_dev *pdev);
 static int iommu_enable_device(struct pci_dev *pdev);
 static int iommu_remove_device(struct pci_dev *pdev);
 
+int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos, uint64_t *paddr,
+                     uint64_t *psize, unsigned int flags)
+{
+    uint32_t hi = 0, bar = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev,
+                                           sbdf.func, pos);
+    uint64_t size;
+
+    ASSERT((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY);
+    pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos, ~0);
+    if ( (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
+         PCI_BASE_ADDRESS_MEM_TYPE_64 )
+    {
+        if ( flags & PCI_BAR_LAST )
+        {
+            printk(XENLOG_WARNING
+                   "%sdevice %04x:%02x:%02x.%u with 64-bit %sBAR in last slot\n",
+                   (flags & PCI_BAR_VF) ? "SR-IOV " : "", sbdf.seg, sbdf.bus,
+                   sbdf.dev, sbdf.func, (flags & PCI_BAR_VF) ? "vf " : "");
+            return -EINVAL;
+        }
+        hi = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos + 4);
+        pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos + 4, ~0);
+    }
+    size = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos) &
+           PCI_BASE_ADDRESS_MEM_MASK;
+    if ( (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
+         PCI_BASE_ADDRESS_MEM_TYPE_64 )
+    {
+        size |= (uint64_t)pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev,
+                                          sbdf.func, pos + 4) << 32;
+        pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos + 4, hi);
+    }
+    else if ( size )
+        size |= (uint64_t)~0 << 32;
+    pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos, bar);
+    size = -size;
+
+    if ( paddr )
+        *paddr = (bar & PCI_BASE_ADDRESS_MEM_MASK) | ((uint64_t)hi << 32);
+    *psize = size;
+
+    if ( (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
+         PCI_BASE_ADDRESS_MEM_TYPE_64 )
+        return 2;
+
+    return 1;
+}
+
 int pci_add_device(u16 seg, u8 bus, u8 devfn,
                    const struct pci_dev_info *info, nodeid_t node)
 {
@@ -674,11 +722,16 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn,
             unsigned int i;
 
             BUILD_BUG_ON(ARRAY_SIZE(pdev->vf_rlen) != PCI_SRIOV_NUM_BARS);
-            for ( i = 0; i < PCI_SRIOV_NUM_BARS; ++i )
+            for ( i = 0; i < PCI_SRIOV_NUM_BARS; )
             {
                 unsigned int idx = pos + PCI_SRIOV_BAR + i * 4;
                 u32 bar = pci_conf_read32(seg, bus, slot, func, idx);
-                u32 hi = 0;
+                pci_sbdf_t sbdf = {
+                    .seg = seg,
+                    .bus = bus,
+                    .dev = slot,
+                    .func = func,
+                };
 
                 if ( (bar & PCI_BASE_ADDRESS_SPACE) ==
                      PCI_BASE_ADDRESS_SPACE_IO )
@@ -689,38 +742,15 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn,
                            seg, bus, slot, func, i);
                     continue;
                 }
-                pci_conf_write32(seg, bus, slot, func, idx, ~0);
-                if ( (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
-                     PCI_BASE_ADDRESS_MEM_TYPE_64 )
-                {
-                    if ( i >= PCI_SRIOV_NUM_BARS )
-                    {
-                        printk(XENLOG_WARNING
-                               "SR-IOV device %04x:%02x:%02x.%u with 64-bit"
-                               " vf BAR in last slot\n",
-                               seg, bus, slot, func);
-                        break;
-                    }
-                    hi = pci_conf_read32(seg, bus, slot, func, idx + 4);
-                    pci_conf_write32(seg, bus, slot, func, idx + 4, ~0);
-                }
-                pdev->vf_rlen[i] = pci_conf_read32(seg, bus, slot, func, idx) &
-                                   PCI_BASE_ADDRESS_MEM_MASK;
-                if ( (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
-                     PCI_BASE_ADDRESS_MEM_TYPE_64 )
-                {
-                    pdev->vf_rlen[i] |= (u64)pci_conf_read32(seg, bus,
-                                                             slot, func,
-                                                             idx + 4) << 32;
-                    pci_conf_write32(seg, bus, slot, func, idx + 4, hi);
-                }
-                else if ( pdev->vf_rlen[i] )
-                    pdev->vf_rlen[i] |= (u64)~0 << 32;
-                pci_conf_write32(seg, bus, slot, func, idx, bar);
-                pdev->vf_rlen[i] = -pdev->vf_rlen[i];
-                if ( (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
-                     PCI_BASE_ADDRESS_MEM_TYPE_64 )
-                    ++i;
+                ret = pci_size_mem_bar(sbdf, idx, NULL, &pdev->vf_rlen[i],
+                                       PCI_BAR_VF |
+                                       (i == PCI_SRIOV_NUM_BARS - 1) ?
+                                       PCI_BAR_LAST : 0);
+                if ( ret < 0 )
+                    break;
+
+                ASSERT(ret);
+                i += ret;
             }
         }
         else
diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h
index b7a6abfc53..80eb1e7fb9 100644
--- a/xen/include/xen/pci.h
+++ b/xen/include/xen/pci.h
@@ -189,6 +189,10 @@ const char *parse_pci(const char *, unsigned int *seg, unsigned int *bus,
 const char *parse_pci_seg(const char *, unsigned int *seg, unsigned int *bus,
                           unsigned int *dev, unsigned int *func, bool *def_seg);
 
+#define PCI_BAR_VF      (1u << 0)
+#define PCI_BAR_LAST    (1u << 1)
+int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos, uint64_t *addr,
+                     uint64_t *size, unsigned int flags);
 
 bool_t pcie_aer_get_firmware_first(const struct pci_dev *);
 
-- 
2.13.5 (Apple Git-94)


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  parent reply	other threads:[~2017-10-18 11:40 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-18 11:40 [PATCH v7 for-next 00/12] vpci: PCI config space emulation Roger Pau Monne
2017-10-18 11:40 ` [PATCH v7 for-next 01/12] x86/pio: allow internal PIO handlers to return RETRY Roger Pau Monne
2017-10-20  9:28   ` Paul Durrant
2017-10-18 11:40 ` [PATCH v7 for-next 02/12] pci: introduce a type to store a SBDF Roger Pau Monne
2017-10-26 15:57   ` Jan Beulich
2017-10-31 10:50   ` Wei Liu
2017-10-18 11:40 ` [PATCH v7 for-next 03/12] vpci: introduce basic handlers to trap accesses to the PCI config space Roger Pau Monne
2017-10-20  9:34   ` Paul Durrant
2017-12-12 16:17   ` Jan Beulich
2017-10-18 11:40 ` [PATCH v7 for-next 04/12] x86/mmcfg: add handlers for the PVH Dom0 MMCFG areas Roger Pau Monne
2017-10-20  9:47   ` Paul Durrant
2017-12-12 16:25   ` Jan Beulich
2017-10-18 11:40 ` [PATCH v7 for-next 05/12] x86/physdev: enable PHYSDEVOP_pci_mmcfg_reserved for PVH Dom0 Roger Pau Monne
2017-12-15 10:45   ` Jan Beulich
2017-10-18 11:40 ` Roger Pau Monne [this message]
2017-12-15 10:54   ` [PATCH v7 for-next 06/12] pci: split code to size BARs from pci_add_device Jan Beulich
2017-10-18 11:40 ` [PATCH v7 for-next 07/12] pci: add support to size ROM BARs to pci_size_mem_bar Roger Pau Monne
2017-10-18 11:40 ` [PATCH v7 for-next 08/12] xen: introduce rangeset_consume_ranges Roger Pau Monne
2017-10-31 10:50   ` Wei Liu
2017-10-18 11:40 ` [PATCH v7 for-next 09/12] vpci/bars: add handlers to map the BARs Roger Pau Monne
2017-12-15 11:43   ` Jan Beulich
2018-01-19 15:47     ` Roger Pau Monné
2018-01-19 16:16       ` Jan Beulich
2018-01-19 16:57         ` Roger Pau Monné
2017-10-18 11:40 ` [PATCH v7 for-next 10/12] vpci/msi: add MSI handlers Roger Pau Monne
2017-10-20  9:58   ` Paul Durrant
2017-12-15 12:07   ` Jan Beulich
2018-01-22 12:48     ` Roger Pau Monné
2018-01-22 12:58       ` Jan Beulich
2018-01-22 14:55         ` Roger Pau Monné
2017-10-18 11:40 ` [PATCH v7 for-next 11/12] vpci: add a priority parameter to the vPCI register initializer Roger Pau Monne
2017-10-18 11:40 ` [PATCH v7 for-next 12/12] vpci/msix: add MSI-X handlers Roger Pau Monne
2017-12-20 16:13   ` Jan Beulich
2018-01-23 10:38     ` Roger Pau Monné

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