From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhong Yang Subject: Re: [PATCH] x86/cpuid: Enable new SSE/AVX/AVX512 cpu features Date: Tue, 7 Nov 2017 14:28:28 +0800 Message-ID: <20171107062828.GA3232@yangzhon-Virtual> References: <1509113884-4097-1-git-send-email-yang.zhong@intel.com> <5A004A01020000780018C7C3@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <5A004A01020000780018C7C3@prv-mh.provo.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: Jan Beulich Cc: Andrew Cooper , xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org T24gTW9uLCBOb3YgMDYsIDIwMTcgYXQgMDM6Mzk6NDVBTSAtMDcwMCwgSmFuIEJldWxpY2ggd3Jv dGU6Cj4gPj4+IE9uIDI3LjEwLjE3IGF0IDE2OjE4LCA8eWFuZy56aG9uZ0BpbnRlbC5jb20+IHdy b3RlOgo+ID4gSW50ZWwgSWNlTGFrZSBjcHUgaGFzIGFkZGVkIG5ldyBjcHUgZmVhdHVyZXM6IEFW WDUxMlZCTUkyL0dGTkkvCj4gPiBWQUVTL0FWWDUxMlZOTkkvQVZYNTEyQklUQUxHL1ZQQ0xNVUxR RFEuIFRob3NlIG5ldyBjcHUgZmVhdHVyZXMKPiA+IG5lZWQgZXhwb3NlIHRvIGd1ZXN0LndxCj4g Cj4gRmlyc3Qgb2YgYWxsLCBwbGVhc2UgZG9uJ3QgZm9yZ2V0IHRvIENjIHJlbGV2YW50IG1haW50 YWluZXJzLgo+IAogIFRoYW5rcyBKYW4ncyByZW1pbmQuCiAgCj4gPiBUaGUgYml0IGRlZmluaXRp b246Cj4gPiBDUFVJRC4oRUFYPTcsRUNYPTApOkVDWFtiaXQgMDZdIEFWWDUxMlZCTUkyCj4gPiBD UFVJRC4oRUFYPTcsRUNYPTApOkVDWFtiaXQgMDhdIEdGTkkKPiA+IENQVUlELihFQVg9NyxFQ1g9 MCk6RUNYW2JpdCAwOV0gVkFFUwo+ID4gQ1BVSUQuKEVBWD03LEVDWD0wKTpFQ1hbYml0IDEwXSBW UENMTVVMUURRCj4gCj4gVGhlc2UgbGFzdCB0aHJlZSBoYXZlIFZFWCAoYW5kIGZvciBHRk5JIGV2 ZW4gbGVnYWN5KSBlbmNvZGluZ3MuCj4gV2hpbGUgaXQgd291bGRuJ3QgYmUgcmVhc29uYWJsZSB5 ZXQgdG8gcmVxdWVzdCBFVkVYIGVuY29kZWQgaW5zbgo+IHN1cHBvcnQgdG8gYmUgYWRkZWQgdG8g dGhlIGVtdWxhdG9yIHdoaWxlIGVuYWJsaW5nIG5ldyBJU0EKPiBleHRlbnNpb25zLCBJIHRoaW5r IGxlZ2FjeSBhbmQgVkVYIGVuY29kZWQgb25lcyBzaG91bGQgYmUgdGFrZW4KPiBjYXJlIG9mIHdp dGggdGhlIHN0YXRlIHRoZSBlbXVsYXRvciBpcyBjdXJyZW50bHkgaW4uCj4gCj4gSmFuCiAgCiAg SGVsbG8gSmFuLAoKICBUaGFua3MgZm9yIHJldmlld2luZyBteSBwYXRjaCEgCiAgRm9yIHRob3Nl IG5ldyBpbnN0cnVjdGlvbnMsIHlvdSBtZWFuIGkgYWxzbyBuZWVkIHRvIHN1cHBvcnQgdGhvc2Ug CiAgdGhyZWUgaW5zdHJ1Y3Rpb25zKEdGTkksVkFFUyBhbmQgVlBDTE1VTFFEUSkgaW4geDg2X2Vt dWxhdGUoKSBpbiBQVj8gCgogIE1hbnkgdGhhbmtzIQoKICBSZWdhcmRzLAoKICBZYW5nCgoKX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KWGVuLWRldmVsIG1h aWxpbmcgbGlzdApYZW4tZGV2ZWxAbGlzdHMueGVuLm9yZwpodHRwczovL2xpc3RzLnhlbi5vcmcv eGVuLWRldmVsCg==